Date: Wed, 13 Sep 2023 09:13:50 GMT From: Mark Johnston <markj@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: c265e6217951 - stable/14 - qat: Intel 4xxx Series driver API extension Message-ID: <202309130913.38D9Doxt016866@gitrepo.freebsd.org>
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The branch stable/14 has been updated by markj: URL: https://cgit.FreeBSD.org/src/commit/?id=c265e6217951b8bf71dbf59832e06d9f2c0b0325 commit c265e6217951b8bf71dbf59832e06d9f2c0b0325 Author: Piotr Kasierski <piotrx.kasierski@intel.com> AuthorDate: 2023-09-06 13:51:41 +0000 Commit: Mark Johnston <markj@FreeBSD.org> CommitDate: 2023-09-13 09:12:52 +0000 qat: Intel 4xxx Series driver API extension This commit introduces: - Quick Assist API update for partial decompress and zero padding. - Refactor of UIO locking. - VF driver hotplug fix. - Minor code style fixes for firmware API. Patch co-authored by: Krzysztof Zdziarski <krzysztofx.zdziarski@intel.com> Patch co-authored by: Michal Gulbicki <michalx.gulbicki@intel.com> Patch co-authored by: Piotr Kasierski <piotrx.kasierski@intel.com> Patch co-authored by: Karol Grzadziel <karolx.grzadziel@intel.com> Sponsored by: Intel Corporation MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D41613 (cherry picked from commit 22cf89c938886d14f5796fc49f9f020c23ea8eaf) --- share/man/man4/qat.4 | 4 +- sys/dev/qat/qat_api/common/compression/dc_dp.c | 296 ++++++++++++- .../common/compression/include/dc_datapath.h | 11 + sys/dev/qat/qat_api/common/ctrl/sal_compression.c | 8 - sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h | 18 +- .../qat/qat_api/firmware/include/icp_qat_fw_comp.h | 486 ++++++++++----------- .../qat_api/firmware/include/icp_qat_hw_20_comp.h | 63 ++- .../firmware/include/icp_qat_hw_20_comp_defs.h | 159 ++++++- sys/dev/qat/qat_api/include/dc/cpa_dc.h | 15 +- sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h | 431 ++++++++++++++++++ sys/dev/qat/qat_api/include/icp_sal_versions.h | 2 +- sys/dev/qat/qat_common/adf_ctl_drv.c | 3 +- sys/dev/qat/qat_common/adf_freebsd_dev_processes.c | 24 +- sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c | 13 +- sys/dev/qat/qat_common/adf_pfvf_vf_proto.c | 5 + sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c | 18 +- sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c | 32 +- 17 files changed, 1221 insertions(+), 367 deletions(-) diff --git a/share/man/man4/qat.4 b/share/man/man4/qat.4 index 347f257c7aec..b0fa0b0cbc92 100644 --- a/share/man/man4/qat.4 +++ b/share/man/man4/qat.4 @@ -64,8 +64,8 @@ driver supports cryptography and compression acceleration. A complete API for offloading these operations is exposed in the kernel and may be used by any other entity directly. For details of usage and supported operations and algorithms refer to the -following documentation available from -.Lk 01.org : +following documentation available from Intel Download Center +.Lk https://downloadcenter.intel.com : .Bl -bullet -compact .It .Rs diff --git a/sys/dev/qat/qat_api/common/compression/dc_dp.c b/sys/dev/qat/qat_api/common/compression/dc_dp.c index 1bc50d89365d..8b409d9ad7ca 100644 --- a/sys/dev/qat/qat_api/common/compression/dc_dp.c +++ b/sys/dev/qat/qat_api/common/compression/dc_dp.c @@ -217,6 +217,89 @@ dcDataPlaneParamCheck(const CpaDcDpOpData *pOpData) return CPA_STATUS_SUCCESS; } +/** + ***************************************************************************** + * @ingroup cpaDcDp + * Partial-read parameters validation utility. + * + * @description + * Basic check that all partial-read related parameters provided by + * caller are valid. + * + * @param[in] pOpData Pointer to a structure containing the + * request parameters + * @param[in] pPartReadData Pointer to a structure containing the + * partial-read request parameters. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in + * + *****************************************************************************/ +static CpaStatus +dcDataPlanePartReadCheck(CpaDcDpOpData *pOpData, + CpaDcDpPartialReadData *pPartReadData) +{ + sal_compression_service_t *pService = NULL; + + LAC_CHECK_NULL_PARAM(pPartReadData); + + pService = (sal_compression_service_t *)(pOpData->dcInstance); + + if (!isDcGen4x(pService)) { + /* Extended features are not supported prior Gen4 */ + return CPA_STATUS_UNSUPPORTED; + } + + if (pOpData->sessDirection == CPA_DC_DIR_COMPRESS) { + /* Decompression specific feature */ + return CPA_STATUS_INVALID_PARAM; + } + + if (pPartReadData->length > pOpData->bufferLenForData) { + QAT_UTILS_LOG( + "Partial read data length can not be greater than the destination buffer size\n"); + return CPA_STATUS_INVALID_PARAM; + } + + return CPA_STATUS_SUCCESS; +} + +/** + ***************************************************************************** + * @ingroup cpaDcDp + * Zero-padding parameters validation utility. + * + * @description + * Basic check that all zero-padding related parameters provided by + * caller are valid. + * + * @param[in] pOpData Pointer to a structure containing the + * request parameters. + * + * @retval CPA_STATUS_SUCCESS Function executed successfully + * @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in + * @retval CPA_STATUS_NOT_SUPPORTED Feature not supported + * + *****************************************************************************/ +static CpaStatus +dcDataPlaneZeroPadCheck(CpaDcDpOpData *pOpData) +{ + sal_compression_service_t *pService = NULL; + + pService = (sal_compression_service_t *)(pOpData->dcInstance); + + if (!isDcGen4x(pService)) { + /* Extended features are not supported prior Gen4 */ + return CPA_STATUS_UNSUPPORTED; + } + + if (pOpData->sessDirection == CPA_DC_DIR_DECOMPRESS) { + /* Compression specific feature */ + return CPA_STATUS_INVALID_PARAM; + } + + return CPA_STATUS_SUCCESS; +} CpaStatus cpaDcDpGetSessionSize(CpaInstanceHandle dcInstance, CpaDcSessionSetupData *pSessionData, @@ -379,8 +462,60 @@ dcDpWriteRingMsg(CpaDcDpOpData *pOpData, icp_qat_fw_comp_req_t *pCurrentQatMsg) pCurrentQatMsg->comp_pars.out_buffer_sz = pOpData->bufferLenForData; } -CpaStatus -cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow) +/** + ***************************************************************************** + * @ingroup cpaDcDp + * + * @description + * Updates the request decryptor with optional parameters: + * - partial read specific fields + * - zero-padding specific field + * + * @param[in] pOpData Pointer to a structure containing the + * request parameters. + * @param[in] pPartReadData Pointer to a structure containing the + * partial-read request parameters. + * @param[in] zeroPadFlag Boolean indicator containing the + * zero-padding enablement flag. + * @param[in] pCurrentQatMsg Pointer to current QAT message on the ring. + * + *****************************************************************************/ +static void +dcDpUpdateRingMsg(CpaDcDpOpData *pOpData, + CpaDcDpPartialReadData *pPartReadData, + CpaBoolean zeroPadFlag, + icp_qat_fw_comp_req_t *pCurrentQatMsg) +{ + sal_compression_service_t *pService = NULL; + + pService = (sal_compression_service_t *)(pOpData->dcInstance); + if (!isDcGen4x(pService)) { + return; + } + + /* Partial read settings */ + if (NULL != pPartReadData) { + pCurrentQatMsg->u1.partial_decompress + .partial_decompress_offset = pPartReadData->dataOffset; + pCurrentQatMsg->u1.partial_decompress + .partial_decompress_length = pPartReadData->length; + ICP_QAT_FW_COMP_PART_DECOMP_SET( + pCurrentQatMsg->comp_pars.req_par_flags, + ICP_QAT_FW_COMP_PART_DECOMP); + } + /* Zero padding settings */ + if (CPA_TRUE == zeroPadFlag) { + ICP_QAT_FW_COMP_ZEROPAD_SET( + pCurrentQatMsg->comp_pars.req_par_flags, + ICP_QAT_FW_COMP_ZEROPAD); + } +} + +static CpaStatus +dcDpEnqueueOpBase(CpaDcDpOpData *pOpData, + CpaDcDpPartialReadData *pPartReadData, + CpaBoolean zeroPadFlag, + const CpaBoolean performOpNow) { icp_qat_fw_comp_req_t *pCurrentQatMsg = NULL; icp_comms_trans_handle trans_handle = NULL; @@ -392,6 +527,20 @@ cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow) return status; } + if (NULL != pPartReadData) { + status = dcDataPlanePartReadCheck(pOpData, pPartReadData); + if (CPA_STATUS_SUCCESS != status) { + return status; + } + } + + if (CPA_TRUE == zeroPadFlag) { + status = dcDataPlaneZeroPadCheck(pOpData); + if (CPA_STATUS_SUCCESS != status) { + return status; + } + } + if ((CPA_FALSE == pOpData->compressAndVerify) && (CPA_DC_DIR_COMPRESS == pOpData->sessDirection)) { return CPA_STATUS_UNSUPPORTED; @@ -422,6 +571,13 @@ cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow) } dcDpWriteRingMsg(pOpData, pCurrentQatMsg); + if (NULL != pPartReadData || CPA_TRUE == zeroPadFlag) { + dcDpUpdateRingMsg(pOpData, + pPartReadData, + zeroPadFlag, + pCurrentQatMsg); + } + pSessionDesc->pendingDpStatelessCbCount++; if (CPA_TRUE == performOpNow) { @@ -432,9 +588,36 @@ cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow) } CpaStatus -cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, - CpaDcDpOpData *pOpData[], - const CpaBoolean performOpNow) +cpaDcDpEnqueueOp(CpaDcDpOpData *pOpData, const CpaBoolean performOpNow) +{ + + return dcDpEnqueueOpBase(pOpData, NULL, CPA_FALSE, performOpNow); +} + +CpaStatus +cpaDcDpEnqueueOpWithPartRead(CpaDcDpOpData *pOpData, + CpaDcDpPartialReadData *pPartReadData, + const CpaBoolean performOpNow) +{ + return dcDpEnqueueOpBase(pOpData, + pPartReadData, + CPA_FALSE, + performOpNow); +} + +CpaStatus +cpaDcDpEnqueueOpWithZeroPad(CpaDcDpOpData *pOpData, + const CpaBoolean performOpNow) +{ + return dcDpEnqueueOpBase(pOpData, NULL, CPA_TRUE, performOpNow); +} + +static CpaStatus +dcDpEnqueueOpBatchBase(const Cpa32U numberRequests, + CpaDcDpOpData *pOpData[], + CpaDcDpPartialReadData *pPartData[], + CpaBoolean zeroPadFlag, + const CpaBoolean performOpNow) { icp_qat_fw_comp_req_t *pCurrentQatMsg = NULL; icp_comms_trans_handle trans_handle = NULL; @@ -462,6 +645,21 @@ cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, return status; } + if (NULL != pPartData) { + status = + dcDataPlanePartReadCheck(pOpData[i], pPartData[i]); + if (CPA_STATUS_SUCCESS != status) { + return status; + } + } + + if (CPA_TRUE == zeroPadFlag) { + status = dcDataPlaneZeroPadCheck(pOpData[i]); + if (CPA_STATUS_SUCCESS != status) { + return status; + } + } + /* Check that all instance handles and session handles are the * same */ if (pOpData[i]->dcInstance != pOpData[0]->dcInstance) { @@ -516,6 +714,18 @@ cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, for (i = 0; i < numberRequests; i++) { dcDpWriteRingMsg(pOpData[i], pCurrentQatMsg); + if (pPartData) { + dcDpUpdateRingMsg(pOpData[i], + pPartData[i], + CPA_FALSE, + pCurrentQatMsg); + } + if (CPA_TRUE == zeroPadFlag) { + dcDpUpdateRingMsg(pOpData[i], + NULL, + CPA_TRUE, + pCurrentQatMsg); + } icp_adf_getQueueNext(trans_handle, (void **)&pCurrentQatMsg); } @@ -528,6 +738,34 @@ cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, return CPA_STATUS_SUCCESS; } +CpaStatus +cpaDcDpEnqueueOpBatch(const Cpa32U numberRequests, + CpaDcDpOpData *pOpData[], + const CpaBoolean performOpNow) +{ + return dcDpEnqueueOpBatchBase( + numberRequests, pOpData, NULL, CPA_FALSE, performOpNow); +} + +CpaStatus +cpaDcDpEnqueueOpWithPartReadBatch(const Cpa32U numberRequests, + CpaDcDpOpData *pOpData[], + CpaDcDpPartialReadData *pPartReadData[], + const CpaBoolean performOpNow) +{ + return dcDpEnqueueOpBatchBase( + numberRequests, pOpData, pPartReadData, CPA_FALSE, performOpNow); +} + +CpaStatus +cpaDcDpEnqueueOpWithZeroPadBatch(const Cpa32U numberRequests, + CpaDcDpOpData *pOpData[], + const CpaBoolean performOpNow) +{ + return dcDpEnqueueOpBatchBase( + numberRequests, pOpData, NULL, CPA_TRUE, performOpNow); +} + CpaStatus icp_sal_DcPollDpInstance(CpaInstanceHandle dcInstance, Cpa32U responseQuota) { @@ -565,3 +803,51 @@ cpaDcDpPerformOpNow(CpaInstanceHandle dcInstance) return CPA_STATUS_SUCCESS; } + +CpaStatus +cpaDcDpIsPartReadSupported(const CpaInstanceHandle instanceHandle, + CpaBoolean *flag) +{ + sal_compression_service_t *pService = NULL; + dc_extd_ftrs_t *pExtendedFtrs = NULL; + + LAC_CHECK_NULL_PARAM(instanceHandle); + SAL_CHECK_INSTANCE_TYPE(instanceHandle, SAL_SERVICE_TYPE_COMPRESSION); + + pService = (sal_compression_service_t *)instanceHandle; + if (!isDcGen4x(pService)) { + *flag = CPA_FALSE; + return CPA_STATUS_SUCCESS; + } + + pExtendedFtrs = (dc_extd_ftrs_t *)&( + ((sal_service_t *)instanceHandle)->dcExtendedFeatures); + + *flag = (CpaBoolean)pExtendedFtrs->is_part_read; + + return CPA_STATUS_SUCCESS; +} + +CpaStatus +cpaDcDpIsZeroPadSupported(const CpaInstanceHandle instanceHandle, + CpaBoolean *flag) +{ + sal_compression_service_t *pService = NULL; + dc_extd_ftrs_t *pExtendedFtrs = NULL; + + LAC_CHECK_NULL_PARAM(instanceHandle); + SAL_CHECK_INSTANCE_TYPE(instanceHandle, SAL_SERVICE_TYPE_COMPRESSION); + + pService = (sal_compression_service_t *)instanceHandle; + if (!isDcGen4x(pService)) { + *flag = CPA_FALSE; + return CPA_STATUS_SUCCESS; + } + + pExtendedFtrs = (dc_extd_ftrs_t *)&( + ((sal_service_t *)instanceHandle)->dcExtendedFeatures); + + *flag = (CpaBoolean)pExtendedFtrs->is_zero_pad; + + return CPA_STATUS_SUCCESS; +} diff --git a/sys/dev/qat/qat_api/common/compression/include/dc_datapath.h b/sys/dev/qat/qat_api/common/compression/include/dc_datapath.h index 5bcff65c4fb3..58fb56f3c8ae 100644 --- a/sys/dev/qat/qat_api/common/compression/include/dc_datapath.h +++ b/sys/dev/qat/qat_api/common/compression/include/dc_datapath.h @@ -196,4 +196,15 @@ typedef enum dc_cnv_mode_s { /* CNV = TRUE, CNVNR = TRUE */ } dc_cnv_mode_t; +/* Type to access extended features bit fields */ +typedef struct dc_extended_features_s { + unsigned is_cnv : 1; /* Bit<0> */ + unsigned padding : 7; + unsigned is_cnvnr : 1; /* Bit<8> */ + unsigned reserved : 2; + unsigned is_part_read : 1; /* Bit<11> */ + unsigned is_zero_pad : 1; /* Bit<12> */ + unsigned not_used : 19; +} dc_extd_ftrs_t; + #endif /* DC_DATAPATH_H_ */ diff --git a/sys/dev/qat/qat_api/common/ctrl/sal_compression.c b/sys/dev/qat/qat_api/common/ctrl/sal_compression.c index f0e8d28949ff..c0f5a411d87e 100644 --- a/sys/dev/qat/qat_api/common/ctrl/sal_compression.c +++ b/sys/dev/qat/qat_api/common/ctrl/sal_compression.c @@ -52,14 +52,6 @@ /* C string null terminator size */ #define SAL_NULL_TERM_SIZE 1 -/* Type to access extended features bit fields */ -typedef struct dc_extended_features_s { - unsigned is_cnv : 1; /* Bit<0> */ - unsigned padding : 7; - unsigned is_cnvnr : 1; /* Bit<8> */ - unsigned not_used : 23; -} dc_extd_ftrs_t; - /* * Prints statistics for a compression instance */ diff --git a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h index 28dfeff6579e..b4d1f5829ba2 100644 --- a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h +++ b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h @@ -1386,21 +1386,9 @@ typedef struct icp_qat_fw_comn_resp_s { /**< Error Code constant value for submission of empty dynamic stored block to * slice */ -#define ERR_CODE_EXCEED_MAX_REQ_TIME -24 -/**< Error Code constant for exceeding max request time */ - -#define ERR_CODE_KPT_CRYPTO_SERVICE_FAIL_INVALID_HANDLE -20 -/**< Error Code constant for invalid handle in kpt crypto service */ - -#define ERR_CODE_KPT_CRYPTO_SERVICE_FAIL_HMAC_FAILED -21 -/**< Error Code constant for failed hmac in kpt crypto service */ - -#define ERR_CODE_KPT_CRYPTO_SERVICE_FAIL_INVALID_WRAPPING_ALGO -22 -/**< Error Code constant for invalid wrapping algo in kpt crypto service */ - -#define ERR_CODE_KPT_DRNG_SEED_NOT_LOAD -23 -/**< Error Code constant for no drng seed is not loaded in kpt ecdsa signrs -/service */ +#define ERR_CODE_REGION_OUT_OF_BOUNDS -21 +/**< Error returned when decompression ends before the specified partial + * decompression region was produced */ #define ERR_CODE_MISC_ERROR -50 /**< Error Code constant for error detected but the source diff --git a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h index 5edf7022ee1d..fe1b7ad55de8 100644 --- a/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h +++ b/sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h @@ -47,6 +47,7 @@ typedef enum { } icp_qat_fw_comp_cmd_id_t; + /* * REQUEST FLAGS IN COMMON COMPRESSION * In common message it is named as SERVICE SPECIFIC FLAGS. @@ -64,7 +65,8 @@ typedef enum { * are don't care. i.e., these features are removed from QAT 2.0. */ -/** Flag usage */ + +/**< Flag usage */ #define ICP_QAT_FW_COMP_STATELESS_SESSION 0 /**< @ingroup icp_qat_fw_comp @@ -108,7 +110,7 @@ typedef enum { * Flag representing secure RAM from being used as * an intermediate buffer is ENABLED. */ -/** Flag mask & bit position */ +/**< Flag mask & bit position */ #define ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS 2 /**< @ingroup icp_qat_fw_comp @@ -148,7 +150,7 @@ typedef enum { #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS 7 /**< @ingroup icp_qat_fw_comp * Starting bit position for flag used to disable secure ram from - * being used as an intermediate buffer. */ + being used as an intermediate buffer. */ #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK 0x1 /**< @ingroup icp_qat_fw_comp @@ -170,7 +172,7 @@ typedef enum { * @ret_uncomp RetUnCompressed * @secure_ram Secure Ram usage * - *********************************************************************************/ + ******************************************************************************/ #define ICP_QAT_FW_COMP_FLAGS_BUILD( \ sesstype, autoselect, enhanced_asb, ret_uncomp, secure_ram) \ (((sesstype & ICP_QAT_FW_COMP_SESSION_TYPE_MASK) \ @@ -215,7 +217,7 @@ typedef enum { * * @param flags Flags to extract the session type bit from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_SESSION_TYPE_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS, \ @@ -230,7 +232,7 @@ typedef enum { * * @param flags Flags to extract the autoSelectBest bit from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS, \ @@ -245,7 +247,7 @@ typedef enum { * * @param flags Flags to extract the enhanced asb bit from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_EN_ASB_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS, \ @@ -260,7 +262,7 @@ typedef enum { * * @param flags Flags to extract the Ret Uncomp bit from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_RET_UNCOMP_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS, \ @@ -275,21 +277,21 @@ typedef enum { * * @param flags Flags to extract the Secure Ram usage from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_SECURE_RAM_USE_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS, \ ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) /** - ****************************************************************************** + ***************************************************************************** * @ingroup icp_qat_fw_comp * Definition of the compression header cd pars block * @description * Definition of the compression processing cd pars block. * The structure is a service-specific implementation of the common * structure. - ******************************************************************************/ + *****************************************************************************/ typedef union icp_qat_fw_comp_req_hdr_cd_pars_s { /**< LWs 2-5 */ struct { @@ -301,15 +303,10 @@ typedef union icp_qat_fw_comp_req_hdr_cd_pars_s { uint8_t content_desc_params_sz; /**< Size of the content descriptor parameters in quad words. - * These - * parameters describe the session setup configuration info for - * the - * slices that this request relies upon i.e. the configuration - * word and - * cipher key needed by the cipher slice if there is a request - * for - * cipher - * processing. */ + * These parameters describe the session setup configuration + * info for the slices that this request relies upon i.e. the + * configuration word and cipher key needed by the cipher slice + * if there is a request for cipher processing. */ uint8_t content_desc_hdr_resrvd2; /**< Content descriptor reserved field */ @@ -324,28 +321,28 @@ typedef union icp_qat_fw_comp_req_hdr_cd_pars_s { uint32_t content_desc_resrvd4; /**< Content descriptor reserved field */ + } sl; } icp_qat_fw_comp_req_hdr_cd_pars_t; /** - ****************************************************************************** + ***************************************************************************** * @ingroup icp_qat_fw_comp * Definition of the compression request parameters block * @description * Definition of the compression processing request parameters block. * The structure below forms part of the Compression + Translation - * Parameters block spanning LWs 14-21, thus differing from the common + * Parameters block spanning LWs 14-23, thus differing from the common * base Parameters block structure. Unused fields must be set to 0. * - ******************************************************************************/ + *****************************************************************************/ typedef struct icp_qat_fw_comp_req_params_s { /**< LW 14 */ uint32_t comp_len; /**< Size of input to process in bytes Note: Only EOP requests can be - * odd - * for decompression. IA must set LSB to zero for odd sized intermediate - * inputs */ + * odd for decompression. IA must set LSB to zero for odd sized + * intermediate inputs */ /**< LW 15 */ uint32_t out_buffer_sz; @@ -368,10 +365,10 @@ typedef struct icp_qat_fw_comp_req_params_s { /**< CRC data structure pointer */ } crc; - /** LW 18 */ + /**< LW 18 */ uint32_t req_par_flags; - /** LW 19 */ + /**< LW 19 */ uint32_t rsrvd; } icp_qat_fw_comp_req_params_t; @@ -394,8 +391,10 @@ typedef struct icp_qat_fw_comp_req_params_s { * @param cnvnr Whether internal CNV recovery is to be performed * * ICP_QAT_FW_COMP_NO_CNV_RECOVERY * * ICP_QAT_FW_COMP_CNV_RECOVERY + * @param cnvdfx Whether CNV error injection is to be performed + * * ICP_QAT_FW_COMP_NO_CNV_DFX + * * ICP_QAT_FW_COMP_CNV_DFX * @param crc CRC Mode Flag - 0 legacy, 1 crc data struct - * *****************************************************************************/ #define ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( \ sop, eop, bfinal, cnv, cnvnr, cnvdfx, crc) \ @@ -411,21 +410,64 @@ typedef struct icp_qat_fw_comp_req_params_s { ((crc & ICP_QAT_FW_COMP_CRC_MODE_MASK) \ << ICP_QAT_FW_COMP_CRC_MODE_BITPOS)) + +/* + * REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION + * + * +=====+-----+----- + --- + --- +-----+ --- + ----- + --- + ---- + -- + -- + + * | Bit |31-24| 20 | 19 | 18 | 17 | 16 | 15-7 | 6 | 5-2 | 1 | 0 | + * +=====+-----+----- + --- + ----+-----+ --- + ----- + --- + ---- + -- + -- + + * |Flags|Resvd|xxHash| CRC | CNV |CNVNR| CNV | Resvd |BFin | Resvd|EOP |SOP | + * | |=0 |acc | MODE| DFX | | | =0 | | =0 | | | + * | | | | | | | | | | | | | + * +=====+-----+----- + --- + ----+-----+ --- + ----- + --- + ---- + -- + -- + + */ + + +/** +***************************************************************************** +* @ingroup icp_qat_fw_comp +* Definition of the additional QAT2.0 Compression command types +* @description +* Enumeration which is used to indicate the ids of functions +* that are exposed by the Compression QAT FW service +* +*****************************************************************************/ +typedef enum { + ICP_QAT_FW_COMP_20_CMD_LZ4_COMPRESS = 3, + /*!< LZ4 Compress Request */ + + ICP_QAT_FW_COMP_20_CMD_LZ4_DECOMPRESS = 4, + /*!< LZ4 Decompress Request */ + + ICP_QAT_FW_COMP_20_CMD_LZ4S_COMPRESS = 5, + /*!< LZ4S Compress Request */ + + ICP_QAT_FW_COMP_20_CMD_LZ4S_DECOMPRESS = 6, + /*!< LZ4S Decompress Request */ + + ICP_QAT_FW_COMP_20_CMD_XP10_COMPRESS = 7, + /*!< XP10 Compress Request -- Placeholder */ + + ICP_QAT_FW_COMP_20_CMD_XP10_DECOMPRESS = 8, + /*!< XP10 Decompress Request -- Placeholder */ + + ICP_QAT_FW_COMP_20_CMD_DELIMITER + /**< Delimiter type */ + +} icp_qat_fw_comp_20_cmd_id_t; + + /* * REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION * - * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- + ---- + --- + - * --- + - * | Bit | 31-20 | 19 | 18 | 17 | 16 | 15 - 7 | 6 | 5-2 | 1 | 0 - * | - * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + - * --- + - * | Flags | Resvd | CRC |Resvd| CNVNR | CNV |Resvd Bits|BFin |Resvd | EOP | - * SOP | - * | | =0 | Mode| =0 | | | =0 | | =0 | | | - * | | | | | | | | | | | | - * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + - * --- + + * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- + ---- + --- + --- + + * | Bit | 31-20 | 19 | 18 | 17 | 16 | 15 - 7 | 6 | 5-2 | 1 | 0 | + * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + --- + + * | Flags | Resvd | CRC | CNV | CNVNR | CNV |Resvd Bits|BFin |Resvd | EOP | SOP | + * | | =0 | Mode| DFX | | | =0 | | =0 | | | + * | | | | | | | | | | | | + * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + --- + */ #define ICP_QAT_FW_COMP_NOT_SOP 0 @@ -434,15 +476,15 @@ typedef struct icp_qat_fw_comp_req_params_s { #define ICP_QAT_FW_COMP_SOP 1 /**< @ingroup icp_qat_fw_comp - * Flag representing that a request IS Start of Packet */ + * * Flag representing that a request IS Start of Packet */ #define ICP_QAT_FW_COMP_NOT_EOP 0 /**< @ingroup icp_qat_fw_comp - * Flag representing that a request is NOT Start of Packet */ + * Flag representing that a request is NOT Start of Packet */ #define ICP_QAT_FW_COMP_EOP 1 /**< @ingroup icp_qat_fw_comp - * Flag representing that a request IS End of Packet */ + * Flag representing that a request IS End of Packet */ #define ICP_QAT_FW_COMP_NOT_BFINAL 0 /**< @ingroup icp_qat_fw_comp @@ -484,6 +526,30 @@ typedef struct icp_qat_fw_comp_req_params_s { /**< @ingroup icp_qat_fw_comp * Flag representing to use the external CRC data struct */ +#define ICP_QAT_FW_COMP_NO_XXHASH_ACC 0 +/**< @ingroup icp_qat_fw_comp + * * Flag indicating that xxHash will NOT be accumulated across requests */ + +#define ICP_QAT_FW_COMP_XXHASH_ACC 1 +/**< @ingroup icp_qat_fw_comp + * * Flag indicating that xxHash WILL be accumulated across requests */ + +#define ICP_QAT_FW_COMP_PART_DECOMP 1 +/**< @ingroup icp_qat_fw_comp + * * Flag indicating to perform partial de-compressing */ + +#define ICP_QAT_FW_COMP_NO_PART_DECOMP 1 +/**< @ingroup icp_qat_fw_comp + * * Flag indicating to not perform partial de-compressing */ + +#define ICP_QAT_FW_COMP_ZEROPAD 1 +/**< @ingroup icp_qat_fw_comp + * * Flag indicating to perform zero-padding in compression request */ + +#define ICP_QAT_FW_COMP_NO_ZEROPAD 0 +/**< @ingroup icp_qat_fw_comp + * * Flag indicating to not perform zero-padding in compression request */ + #define ICP_QAT_FW_COMP_SOP_BITPOS 0 /**< @ingroup icp_qat_fw_comp * Starting bit position for SOP */ @@ -516,14 +582,6 @@ typedef struct icp_qat_fw_comp_req_params_s { /**< @ingroup icp_qat_fw_comp * Starting bit position for the CNV bit */ -#define ICP_QAT_FW_COMP_CNV_RECOVERY_MASK 0x1 -/**< @ingroup icp_qat_fw_comp - * One bit mask for the CNV Recovery bit */ - -#define ICP_QAT_FW_COMP_CNV_RECOVERY_BITPOS 17 -/**< @ingroup icp_qat_fw_comp - * Starting bit position for the CNV Recovery bit */ - #define ICP_QAT_FW_COMP_CNVNR_MASK 0x1 /**< @ingroup icp_qat_fw_comp * One bit mask for the CNV Recovery bit */ @@ -556,6 +614,22 @@ typedef struct icp_qat_fw_comp_req_params_s { /**< @ingroup icp_qat_fw_comp * One bit mask used to determine xxHash accumulate mode */ +#define ICP_QAT_FW_COMP_PART_DECOMP_BITPOS 27 +/**< @ingroup icp_qat_fw_comp + * Starting bit position for the partial de-compress bit */ + +#define ICP_QAT_FW_COMP_PART_DECOMP_MASK 0x1 +/**< @ingroup icp_qat_fw_comp + * Starting bit position for the partial de-compress mask */ + +#define ICP_QAT_FW_COMP_ZEROPAD_BITPOS 26 +/**< @ingroup icp_qat_fw_comp + * Starting bit position for the partial zero-pad bit */ + +#define ICP_QAT_FW_COMP_ZEROPAD_MASK 0x1 +/**< @ingroup icp_qat_fw_comp + * Starting bit position for the partial zero-pad mask */ + /** ****************************************************************************** * @ingroup icp_qat_fw_comp @@ -565,7 +639,7 @@ typedef struct icp_qat_fw_comp_req_params_s { * * @param flags Flags to extract the SOP bit from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_SOP_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_SOP_BITPOS, \ @@ -585,8 +659,9 @@ typedef struct icp_qat_fw_comp_req_params_s { QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_EOP_BITPOS, \ ICP_QAT_FW_COMP_EOP_MASK) - /** + + ****************************************************************************** * @ingroup icp_qat_fw_comp * @@ -595,7 +670,7 @@ typedef struct icp_qat_fw_comp_req_params_s { * * @param flags Flags to extract the bfinal bit from * - ******************************************************************************/ + *****************************************************************************/ #define ICP_QAT_FW_COMP_BFINAL_GET(flags) \ QAT_FIELD_GET(flags, \ ICP_QAT_FW_COMP_BFINAL_BITPOS, \ @@ -663,6 +738,70 @@ typedef struct icp_qat_fw_comp_req_params_s { ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) +/** + ****************************************************************************** + * @ingroup icp_qat_fw_comp + * + * @description + * Macro for extraction of the partial de-compress on/off bit + * + * @param flags Flags to extract the partial de-compress on/off bit from + * + ******************************************************************************/ +#define ICP_QAT_FW_COMP_PART_DECOMP_GET(flags) \ + QAT_FIELD_GET(flags, \ + ICP_QAT_FW_COMP_PART_DECOMP_BITPOS, \ + ICP_QAT_FW_COMP_PART_DECOMP_MASK) + +/** + ****************************************************************************** + * @ingroup icp_qat_fw_comp + * + * @description + * Macro for setting of the partial de-compress on/off bit + * + * @param flags Flags to set the partial de-compress on/off bit to + * @param val partial de-compress on/off bit + * + *****************************************************************************/ +#define ICP_QAT_FW_COMP_PART_DECOMP_SET(flags, val) \ + QAT_FIELD_SET(flags, \ + val, \ + ICP_QAT_FW_COMP_PART_DECOMP_BITPOS, \ + ICP_QAT_FW_COMP_PART_DECOMP_MASK) + +/** + ****************************************************************************** + * @ingroup icp_qat_fw_comp + * + * @description + * Macro for extraction of the zero padding on/off bit + * + * @param flags Flags to extract the zero padding on/off bit from + * + ******************************************************************************/ +#define ICP_QAT_FW_COMP_ZEROPAD_GET(flags) \ + QAT_FIELD_GET(flags, \ + ICP_QAT_FW_COMP_ZEROPAD_BITPOS, \ + ICP_QAT_FW_COMP_ZEROPAD_MASK) + +/** + ****************************************************************************** + * @ingroup icp_qat_fw_comp + * + * @description + * Macro for setting of the zero-padding on/off bit + * + * @param flags Flags to set the zero-padding on/off bit to + * @param val zero-padding on/off bit + * + *****************************************************************************/ +#define ICP_QAT_FW_COMP_ZEROPAD_SET(flags, val) \ + QAT_FIELD_SET(flags, \ + val, \ + ICP_QAT_FW_COMP_ZEROPAD_BITPOS, \ + ICP_QAT_FW_COMP_ZEROPAD_MASK) + /** ****************************************************************************** * @ingroup icp_qat_fw_comp @@ -670,23 +809,23 @@ typedef struct icp_qat_fw_comp_req_params_s { * @description * Definition of the translator processing request parameters block * The structure below forms part of the Compression + Translation - * Parameters block spanning LWs 20-21, thus differing from the common + * Parameters block spanning LWs 14-23, thus differing from the common * base Parameters block structure. Unused fields must be set to 0. * - ******************************************************************************/ + *****************************************************************************/ typedef struct icp_qat_fw_xlt_req_params_s { /**< LWs 20-21 */ uint64_t inter_buff_ptr; /**< This field specifies the physical address of an intermediate - * buffer SGL array. The array contains a pair of 64-bit - * intermediate buffer pointers to SGL buffer descriptors, one pair - * per CPM. Please refer to the CPM1.6 Firmware Interface HLD - * specification for more details. - * Placeholder for QAT2.0. */ + * buffer SGL array. The array contains a pair of 64-bit + * intermediate buffer pointers to SGL buffer descriptors, one pair + * per CPM. Please refer to the CPM1.6 Firmware Interface HLD + * specification for more details. */ + } icp_qat_fw_xlt_req_params_t; /** - ****************************************************************************** + ***************************************************************************** * @ingroup icp_qat_fw_comp * Compression header of the content descriptor block * @description @@ -697,7 +836,7 @@ typedef struct icp_qat_fw_xlt_req_params_s { * cd block, thus differing from the common base content descriptor * structure. * - ******************************************************************************/ + *****************************************************************************/ typedef struct icp_qat_fw_comp_cd_hdr_s { /**< LW 24 */ *** 1566 LINES SKIPPED ***
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