From owner-svn-src-all@freebsd.org Fri Aug 21 02:22:52 2015 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id BBE4A9BEE90; Fri, 21 Aug 2015 02:22:52 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id AC614113B; Fri, 21 Aug 2015 02:22:52 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.70]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id t7L2Mqj8092051; Fri, 21 Aug 2015 02:22:52 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id t7L2MqRb092050; Fri, 21 Aug 2015 02:22:52 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201508210222.t7L2MqRb092050@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Fri, 21 Aug 2015 02:22:52 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r286976 - head/sys/powerpc/mpc85xx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Aug 2015 02:22:52 -0000 Author: jhibbits Date: Fri Aug 21 02:22:51 2015 New Revision: 286976 URL: https://svnweb.freebsd.org/changeset/base/286976 Log: Simplify the PCI bus scanning logic. Rather than special casing on PCIC_BRIDGE || PCIC_PROCESSOR, allow all HDRTYPE_BRIDGE types. Obtained from: Semihalf Sponsored by: Alex Perez/Intertial Computing Modified: head/sys/powerpc/mpc85xx/pci_mpc85xx.c Modified: head/sys/powerpc/mpc85xx/pci_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/pci_mpc85xx.c Thu Aug 20 22:44:26 2015 (r286975) +++ head/sys/powerpc/mpc85xx/pci_mpc85xx.c Fri Aug 21 02:22:51 2015 (r286976) @@ -265,7 +265,7 @@ fsl_pcib_attach(device_t dev) */ sc->sc_busnr = 0; maxslot = (sc->sc_pcie) ? 0 : PCI_SLOTMAX; - fsl_pcib_init(sc, sc->sc_busnr, maxslot); + sc->sc_busnr = fsl_pcib_init(sc, sc->sc_busnr, maxslot); if (sc->sc_pcie) { ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1); @@ -570,19 +570,8 @@ fsl_pcib_init(struct fsl_pcib_softc *sc, subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot, func, PCIR_SUBCLASS, 1); - /* - * The PCI Root Complex comes up as a Processor/PowerPC, - * but is a bridge. - */ - /* Allow only proper PCI-PCI briges */ - if (class != PCIC_BRIDGE && class != PCIC_PROCESSOR) - continue; - if (subclass != PCIS_BRIDGE_PCI && - subclass != PCIS_PROCESSOR_POWERPC) - continue; - - if (subclass == PCIS_PROCESSOR_POWERPC && - hdrtype != PCIM_HDRTYPE_BRIDGE) + /* Allow all DEVTYPE 1 devices */ + if (hdrtype != PCIM_HDRTYPE_BRIDGE) continue; secbus++;