From owner-svn-src-head@freebsd.org Fri Jul 13 20:56:51 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 4D7E8104C983; Fri, 13 Jul 2018 20:56:51 +0000 (UTC) (envelope-from markjdb@gmail.com) Received: from mail-pf0-x230.google.com (mail-pf0-x230.google.com [IPv6:2607:f8b0:400e:c00::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id BEAED7838E; Fri, 13 Jul 2018 20:56:50 +0000 (UTC) (envelope-from markjdb@gmail.com) Received: by mail-pf0-x230.google.com with SMTP id l123-v6so23256662pfl.13; Fri, 13 Jul 2018 13:56:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=0fxRTyMs69Ces8WjSf55FcVjcGgSlDlH3X7rE83g8WU=; b=WjuwMN/nkb8YgIe7HvNPRqk7c6X+8EsGiaqqrnvpCoBAW6fB/cOnsPgH6g28Xa2fze 9f1eqzKezNsAQPd/BCGXb7otf1kz/u5EU7abZ2GKkjU/F0Drqot8EUvTn0TyZo+e09L4 +EsLopC/jPiAmPofbFt29kOo+0exh6ojokCbrNCmfzqaHGATzTDsPsPlhHcTYYYAxNl8 MRQ7OmcT5qf5lSazMrwGInzVcb9Lo9vofMS7TvGfYsQ9iP5khvkkkNJEaky4zCdq281y wABg/hwv4ioHLQRT3D/o/rz0PaO1mpwjpRt0wsbes3y6eqS7IaWvvj6ujcXpzE3Pv2d8 jjFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:from:to:cc:subject:message-id :references:mime-version:content-disposition:in-reply-to:user-agent; bh=0fxRTyMs69Ces8WjSf55FcVjcGgSlDlH3X7rE83g8WU=; b=I6UdxTJEVPxcft68xrMIhPZJYIE38Hc1pj6a/sabKGkY0vKWtznSZDNdVbk/roUnFr MN8kryvqYwRwF29B6ja8UUUjaqpUk9FACuMsJIvWkv62hXCs9V4fz5b22RbpJUAp+5PA qknFn8ZzDnJm3F+PzRFQhQq9zqzMW9E/KfJOYa+Vxl5yKNZrEScbblvWDsI3aEkSt9+F ENC+UztTMTFFcfxj4HNes8gVQL6nUMKLttTtbWKSMpZisEnPAaNK0llRie+AYqHl+sgX dGqm4+BBDgDGmebw7K9SkYofFobGCfxzIVn5Q3l4EOd7SpoHDDisZo59miJASfMuAaj1 z+uQ== X-Gm-Message-State: AOUpUlGC8uZhY6TLnWtG2x7cYH1zcSJ3ZRM1geJhAi9Sxk0c7DMwHkOT BL9/1vmQkrjw722uwukal+I= X-Google-Smtp-Source: AAOMgpfoEPDMsNgz2BxZvk9mxAqZ5I356ZOLHCVpvrLLnYEuqX5dLZEvcuX1BhDBMCxuCqkZ3bGgNw== X-Received: by 2002:a63:1844:: with SMTP id 4-v6mr7616603pgy.313.1531515409795; Fri, 13 Jul 2018 13:56:49 -0700 (PDT) Received: from raichu (toroon0560w-lp130-09-70-52-224-107.dsl.bell.ca. [70.52.224.107]) by smtp.gmail.com with ESMTPSA id m6-v6sm37461555pfh.153.2018.07.13.13.56.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Jul 2018 13:56:48 -0700 (PDT) Sender: Mark Johnston Date: Fri, 13 Jul 2018 16:56:46 -0400 From: Mark Johnston To: Konstantin Belousov Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: Re: svn commit: r336257 - head/sys/x86/include Message-ID: <20180713205646.GH26064@raichu> References: <201807131942.w6DJgxN1085315@repo.freebsd.org> <20180713203854.GP5562@kib.kiev.ua> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180713203854.GP5562@kib.kiev.ua> User-Agent: Mutt/1.10.0 (2018-05-17) X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Jul 2018 20:56:51 -0000 On Fri, Jul 13, 2018 at 11:38:54PM +0300, Konstantin Belousov wrote: > On Fri, Jul 13, 2018 at 07:42:59PM +0000, Mark Johnston wrote: > > Author: markj > > Date: Fri Jul 13 19:42:59 2018 > > New Revision: 336257 > > URL: https://svnweb.freebsd.org/changeset/base/336257 > > > > Log: > > Define the MSR used to fetch the current microcode patch level on AMD. > > > > It is defined in the AMD family 17h register reference. > > > > MFC after: 3 days > > Sponsored by: The FreeBSD Foundation > > > > Modified: > > head/sys/x86/include/specialreg.h > > > > Modified: head/sys/x86/include/specialreg.h > > ============================================================================== > > --- head/sys/x86/include/specialreg.h Fri Jul 13 18:58:37 2018 (r336256) > > +++ head/sys/x86/include/specialreg.h Fri Jul 13 19:42:59 2018 (r336257) > > @@ -973,6 +973,7 @@ > > #define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */ > > > > /* AMD64 MSR's */ > > +#define MSR_PATCH_LEVEL 0x0000008b /* microcode revision number */ > This register is called MSR_BIOS_SIGN. It is defined for Intel as well. Oops, thanks. I knew about BIOS_SIGN but somehow convinced myself it had a different value.