From owner-freebsd-arch@FreeBSD.ORG Fri May 15 13:11:06 2009 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 11D5D1065679; Fri, 15 May 2009 13:11:06 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from cyrus.watson.org (cyrus.watson.org [65.122.17.42]) by mx1.freebsd.org (Postfix) with ESMTP id D6ECF8FC08; Fri, 15 May 2009 13:11:05 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (66.111.2.69.static.nyinternet.net [66.111.2.69]) by cyrus.watson.org (Postfix) with ESMTPSA id 89F4146C16; Fri, 15 May 2009 09:11:05 -0400 (EDT) Received: from jhbbsd.hudson-trading.com (unknown [209.249.190.8]) by bigwig.baldwin.cx (Postfix) with ESMTPA id 3803C8A026; Fri, 15 May 2009 09:11:04 -0400 (EDT) From: John Baldwin To: freebsd-arch@freebsd.org Date: Fri, 15 May 2009 08:04:36 -0400 User-Agent: KMail/1.9.7 References: <86tz3o4lb9.fsf@ds4.des.no> <86prec4kwj.fsf@ds4.des.no> <4A0C49FF.1070707@cs.rice.edu> In-Reply-To: <4A0C49FF.1070707@cs.rice.edu> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Message-Id: <200905150804.36977.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0.1 (bigwig.baldwin.cx); Fri, 15 May 2009 09:11:04 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.95 at bigwig.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-2.5 required=4.2 tests=AWL,BAYES_00,RDNS_NONE autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on bigwig.baldwin.cx Cc: alc@freebsd.org, Dag-Erling =?utf-8?q?Sm=C3=B8rgrav?= , Alan Cox , arch@freebsd.org Subject: Re: PTE modified bit emulation trap X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 May 2009 13:11:06 -0000 On Thursday 14 May 2009 12:42:39 pm Alan Cox wrote: > Dag-Erling Sm=C3=B8rgrav wrote: > > [from -alpha, -hackers] > > > > Dag-Erling Sm=C3=B8rgrav writes: > > =20 > >> Coverity complains about the lack of error checking in the following > >> code in sys/kern/kern_sysctl.c, around line 1390: > >> > >> /* > >> * Touch all the wired pages to avoid PTE modified > >> * bit emulation traps on Alpha while holding locks > >> * in the sysctl handler. > >> */ > >> for (i =3D (wiredlen + PAGE_SIZE - 1) / PAGE_SIZE, > >> cp =3D req->oldptr; i > 0; i--, cp +=3D PAGE_SIZE) { > >> copyin(cp, &dummy, 1); > >> copyout(&dummy, cp, 1); > >> } > >> > >> Since Alpha is dead, can we remove this, or is it still needed for oth= er > >> platforms? > >> =20 > > > > kmacy suggested you might be the right person to ask... the conclusion > > so far is that it *might* be necessary on sparc64 and / or mips. > > =20 >=20 > I think that this code may no longer be needed, but I want to=20 > double-check. I faced a related problem implementing superpages=20 > support, so I introduced an additional "access type" parameter to=20 > pmap_enter(). This parameter was specifically intended to allow a=20 > pmap_enter() implementation to preset the PTE's modified bit. I think=20 > that the simulated page fault that occurs on vslock()-style wiring=20 > passes "write access" to pmap_enter(). If so, then it's just a matter=20 > of tweaking the MIPS or any other pmap_enter() to actually do something=20 > with the "access type" parameter. Currently, only the architectures=20 > that implement the pmap-level support for superpages, i.e., amd64 and=20 > i386, do anything with this parameter. Then it sounds like the code should definitely be removed and that if any=20 problems do crop up, they can be fixed in pmap_enter() instead. =2D-=20 John Baldwin