From owner-svn-src-head@freebsd.org Sat Jan 18 04:12:42 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 9B1DC226E2B; Sat, 18 Jan 2020 04:12:42 +0000 (UTC) (envelope-from bdragon@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4804K63X5Jz4WPP; Sat, 18 Jan 2020 04:12:42 +0000 (UTC) (envelope-from bdragon@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 745511C29D; Sat, 18 Jan 2020 04:12:42 +0000 (UTC) (envelope-from bdragon@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 00I4CgkE063382; Sat, 18 Jan 2020 04:12:42 GMT (envelope-from bdragon@FreeBSD.org) Received: (from bdragon@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 00I4CfMe063379; Sat, 18 Jan 2020 04:12:41 GMT (envelope-from bdragon@FreeBSD.org) Message-Id: <202001180412.00I4CfMe063379@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: bdragon set sender to bdragon@FreeBSD.org using -f From: Brandon Bergren Date: Sat, 18 Jan 2020 04:12:41 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r356862 - in head/sys/powerpc: aim include X-SVN-Group: head X-SVN-Commit-Author: bdragon X-SVN-Commit-Paths: in head/sys/powerpc: aim include X-SVN-Commit-Revision: 356862 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 18 Jan 2020 04:12:42 -0000 Author: bdragon Date: Sat Jan 18 04:12:41 2020 New Revision: 356862 URL: https://svnweb.freebsd.org/changeset/base/356862 Log: D23057: [PowerPC] Fix offset calculations in bridge mode In rS354701, I replaced text relocations with offsets from &generictrap. Unfortunately, the magic variable I was using doesn't actually mean the address of &generictrap, in bridge mode it actually means &generictrap64. So, for bridge mode to work, it is necessary to differentiate between "where do we need to branch to to handle a trap" and "where is &generictrap for purposes of doing relative math". Introduce a new TRAP_ENTRY and use it instead of TRAP_GENTRAP for doing actual calls to the generic trap handler. Reported by: Mark Millard Reviewed by: jhibbits Sponsored by: Tag1 Consulting, Inc. Differential Revision: https://reviews.freebsd.org/D23057 > Description of fields to fill in above: 76 columns --| > PR: If and which Problem Report is related. > Submitted by: If someone else sent in the change. > Reported by: If someone else reported the issue. > Reviewed by: If someone else reviewed your modification. > Approved by: If you needed approval for this commit. > Obtained from: If the change is from a third party. > MFC after: N [day[s]|week[s]|month[s]]. Request a reminder email. > MFH: Ports tree branch name. Request approval for merge. > Relnotes: Set to 'yes' for mention in release notes. > Security: Vulnerability reference (one per line) or description. > Sponsored by: If the change was sponsored by an organization (each collaborator). > Differential Revision: https://reviews.freebsd.org/D### (*full* phabric URL needed). > Empty fields above will be automatically removed. M sys/powerpc/aim/aim_machdep.c M sys/powerpc/aim/trap_subr32.S M sys/powerpc/aim/trap_subr64.S M sys/powerpc/include/trap.h Modified: head/sys/powerpc/aim/aim_machdep.c head/sys/powerpc/aim/trap_subr32.S head/sys/powerpc/aim/trap_subr64.S head/sys/powerpc/include/trap.h Modified: head/sys/powerpc/aim/aim_machdep.c ============================================================================== --- head/sys/powerpc/aim/aim_machdep.c Sat Jan 18 03:33:44 2020 (r356861) +++ head/sys/powerpc/aim/aim_machdep.c Sat Jan 18 04:12:41 2020 (r356862) @@ -388,16 +388,18 @@ aim_cpu_init(vm_offset_t toc) bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsiend - (size_t)&dsitrap); + /* Set address of generictrap for self-reloc calculations */ + *((void **)TRAP_GENTRAP) = &generictrap; #ifdef __powerpc64__ /* Set TOC base so that the interrupt code can get at it */ - *((void **)TRAP_GENTRAP) = &generictrap; + *((void **)TRAP_ENTRY) = &generictrap; *((register_t *)TRAP_TOCBASE) = toc; #else /* Set branch address for trap code */ if (cpu_features & PPC_FEATURE_64) - *((void **)TRAP_GENTRAP) = &generictrap64; + *((void **)TRAP_ENTRY) = &generictrap64; else - *((void **)TRAP_GENTRAP) = &generictrap; + *((void **)TRAP_ENTRY) = &generictrap; *((void **)TRAP_TOCBASE) = _GLOBAL_OFFSET_TABLE_; /* G2-specific TLB miss helper handlers */ Modified: head/sys/powerpc/aim/trap_subr32.S ============================================================================== --- head/sys/powerpc/aim/trap_subr32.S Sat Jan 18 03:33:44 2020 (r356861) +++ head/sys/powerpc/aim/trap_subr32.S Sat Jan 18 04:12:41 2020 (r356862) @@ -348,7 +348,7 @@ CNAME(trapcode): mtsprg1 %r1 /* save SP */ mflr %r1 /* Save the old LR in r1 */ mtsprg2 %r1 /* And then in SPRG2 */ - lwz %r1, TRAP_GENTRAP(0) /* Get branch address */ + lwz %r1, TRAP_ENTRY(0) /* Get branch address */ mtlr %r1 li %r1, 0xe0 /* How to get the vector from LR */ blrl /* LR & (0xff00 | r1) is exception # */ @@ -908,7 +908,7 @@ CNAME(dblow): mflr %r1 /* save LR */ mtsprg2 %r1 /* And then in SPRG2 */ - lwz %r1, TRAP_GENTRAP(0) /* Get branch address */ + lwz %r1, TRAP_ENTRY(0) /* Get branch address */ mtlr %r1 li %r1, 0 /* How to get the vector from LR */ blrl /* LR & (0xff00 | r1) is exception # */ Modified: head/sys/powerpc/aim/trap_subr64.S ============================================================================== --- head/sys/powerpc/aim/trap_subr64.S Sat Jan 18 03:33:44 2020 (r356861) +++ head/sys/powerpc/aim/trap_subr64.S Sat Jan 18 04:12:41 2020 (r356862) @@ -318,7 +318,7 @@ CNAME(rstcode): * It is software reset when 46:47 = 0b00 */ /* 0x00 */ - ld %r2,TRAP_GENTRAP(0) /* Real-mode &generictrap */ + ld %r2,TRAP_ENTRY(0) /* Real-mode &generictrap */ mfsrr1 %r9 /* Load SRR1 into r9 */ andis. %r9,%r9,0x3 /* Logic AND with 46:47 bits */ @@ -446,7 +446,7 @@ CNAME(trapcode): mtsprg1 %r1 /* save SP */ mflr %r1 /* Save the old LR in r1 */ mtsprg2 %r1 /* And then in SPRG2 */ - ld %r1,TRAP_GENTRAP(0) + ld %r1,TRAP_ENTRY(0) mtlr %r1 li %r1, 0xe0 /* How to get the vector from LR */ blrl /* Branch to generictrap */ @@ -493,7 +493,7 @@ CNAME(slbtrap): mflr %r1 /* 0x30 */ mtsprg2 %r1 /* save LR in SPRG2 */ - ld %r1,TRAP_GENTRAP(0) /* real-mode &generictrap */ + ld %r1,TRAP_ENTRY(0) /* real-mode &generictrap */ mtlr %r1 li %r1, 0x80 /* How to get the vector from LR */ /* 0x40 */ @@ -955,7 +955,7 @@ CNAME(dblow): mflr %r1 /* save LR */ mtsprg2 %r1 /* And then in SPRG2 */ - ld %r1, TRAP_GENTRAP(0) /* Get branch address */ + ld %r1, TRAP_ENTRY(0) /* Get branch address */ mtlr %r1 li %r1, 0 /* How to get the vector from LR */ blrl /* Branch to generictrap */ Modified: head/sys/powerpc/include/trap.h ============================================================================== --- head/sys/powerpc/include/trap.h Sat Jan 18 03:33:44 2020 (r356861) +++ head/sys/powerpc/include/trap.h Sat Jan 18 04:12:41 2020 (r356862) @@ -147,8 +147,9 @@ #define EXC_DTRACE 0x7ffff808 /* Magic pointer to store TOC base and other info for trap handlers on ppc64 */ -#define TRAP_GENTRAP 0x1f0 -#define TRAP_TOCBASE 0x1f8 +#define TRAP_ENTRY 0x1e8 +#define TRAP_GENTRAP 0x1f0 +#define TRAP_TOCBASE 0x1f8 #ifndef LOCORE struct trapframe;