Date: Thu, 16 Jul 2015 05:13:08 +0000 (UTC) From: Justin Hibbits <jhibbits@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r285620 - head/sys/powerpc/aim Message-ID: <201507160513.t6G5D8iZ093355@repo.freebsd.org>
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Author: jhibbits Date: Thu Jul 16 05:13:08 2015 New Revision: 285620 URL: https://svnweb.freebsd.org/changeset/base/285620 Log: Fix userland program exception handling for powerpc64. It appears that the linker will not handle 64-bit relocations at addresses that are not aligned to 8-byte boundaries. Prior to this change the line: .llong generictrap was aligned to a 4-byte address, and the linker replaced that with an 8-byte 0x0. Aligning that address to 8 bytes caused the linker to generate the proper relocation. As a follow-through, the dblow from trap_subr33.S used the code sequence 'lwz %r1, TRAP_GENTRAP(0)', so this reproduces the analogue of that for 64-bit. Modified: head/sys/powerpc/aim/trap_subr64.S Modified: head/sys/powerpc/aim/trap_subr64.S ============================================================================== --- head/sys/powerpc/aim/trap_subr64.S Thu Jul 16 04:15:22 2015 (r285619) +++ head/sys/powerpc/aim/trap_subr64.S Thu Jul 16 05:13:08 2015 (r285620) @@ -842,11 +842,7 @@ CNAME(dblow): mflr %r1 /* save LR */ mtsprg2 %r1 /* And then in SPRG2 */ - nop /* Begin branching to generictrap */ - bl 9f - .llong generictrap -9: mflr %r1 - ld %r1,0(%r1) + ld %r1, TRAP_GENTRAP(0) /* Get branch address */ mtlr %r1 li %r1, 0 /* How to get the vector from LR */ blrl /* Branch to generictrap */
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