From owner-svn-src-stable@freebsd.org Thu Mar 29 01:35:12 2018 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C44F9F61598; Thu, 29 Mar 2018 01:35:11 +0000 (UTC) (envelope-from freebsd@pdx.rh.CN85.dnsmgr.net) Received: from pdx.rh.CN85.dnsmgr.net (br1.CN84in.dnsmgr.net [69.59.192.140]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 0CC386F45E; Thu, 29 Mar 2018 01:35:09 +0000 (UTC) (envelope-from freebsd@pdx.rh.CN85.dnsmgr.net) Received: from pdx.rh.CN85.dnsmgr.net (localhost [127.0.0.1]) by pdx.rh.CN85.dnsmgr.net (8.13.3/8.13.3) with ESMTP id w2T1Z7fF060081; Wed, 28 Mar 2018 18:35:07 -0700 (PDT) (envelope-from freebsd@pdx.rh.CN85.dnsmgr.net) Received: (from freebsd@localhost) by pdx.rh.CN85.dnsmgr.net (8.13.3/8.13.3/Submit) id w2T1Z7hU060080; Wed, 28 Mar 2018 18:35:07 -0700 (PDT) (envelope-from freebsd) From: "Rodney W. Grimes" Message-Id: <201803290135.w2T1Z7hU060080@pdx.rh.CN85.dnsmgr.net> Subject: Mismerge at r330897 in stable/11, Audit report In-Reply-To: To: Eitan Adler Date: Wed, 28 Mar 2018 18:35:07 -0700 (PDT) CC: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org, re@freebsd.org, eadler@freebsd.org Reply-To: rgrimes@freebsd.org X-Mailer: ELM [version 2.4ME+ PL121h (25)] MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=US-ASCII X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Mar 2018 01:35:12 -0000 > >> Hi! > >> > >> This part of the MFC is wrong: > >> > >> https://svnweb.freebsd.org/base/stable/11/sys/sys/random.h?limit_changes=0&r1=330897&r2=330896&pathrev=330897 Can we try to identify exactly what rXXXXXX that is a merge of? > >> Could you please MFC back the other random related changes too? Some > >> of them made by cem@. > >> > >> On 3/14/18, Eitan Adler wrote: > >>> Author: eadler > >>> Date: Wed Mar 14 03:19:51 2018 > >>> New Revision: 330897 > >>> URL: https://svnweb.freebsd.org/changeset/base/330897 > >>> > >>> Log: > >>> Partial merge of the SPDX changes > >>> > >>> These changes are incomplete but are making it difficult > >>> to determine what other changes can/should be merged. > >>> > >>> No objections from: pfg > >>> > > Am I missing something? If this MFC was supposed to be of the SPDX > > license tagging, why does it have any functional changes? > > > > Especially changes to random(4)? > > This was my failure. I only spot checked & compile-checked the diff > since I expected all changes to be comments/SPDX. > > However, I must have gotten carried away and included a few too many > revisions. Unfortunately some people have already merged fixes to my > failure and thus this can't be reverted as is without also reverting > those fixes. > > That said, I should do that since this commit message is utterly wrong. We do not have to revert r330897, with what follows I think we can easily find the revisions to revert from stable/11. ... I saw someone complain about other bits that got pulled in eadler merged a huge chunk of SPDX tags. This commit is weeks old, and bothersome that this was just now being found. So I decided to Audit r330897 for anything that is not an SPDX change. This audit is basically from: svn diff -r 330896:330897 svn+ssh://repo.freebsd.org/base/stable/11 | \ grep -v '^=========================================================' | \ grep -v '^---' | \ grep -v '^+++' | \ grep -v '^@@ ' | \ grep -v '^ ' | grep -v 'SPDX-License-Identifier' | grep -v '^+ \*$' | \ grep -v '^-/\*$' | \ grep -v '^+/\*-$' | \ more The outout of that was cleaned up slightly by removing the large blocks of Index: path/to/file that showed no other changes to that file, and a few copyright noises leaving us with these very questionable merges that are NOT SPDX related that I can see in any way. There is still some noise, ($FreeBSD) and I left some things in the output that I would like to take a closer look at that are probably noise but I want to make certain. I think r330897 actually merged about 4 or 5 things that are not part of SPDX at all. With the file paths now in hand, it should be a short order to sort out which rXXXXXX should be reverted from stable/11. At the very end is the full mergeinfo. If anyone wants the raw svn diff I can upload that as well. Index: lib/libutil/pw_util.c -/*- +/*-- Index: sbin/dhclient/dhctoken.h + * $FreeBSD$ Index: sbin/dhclient/tree.h + * $FreeBSD$ Index: sbin/rcorder/sprite.h + * $FreeBSD$ Index: share/examples/tests/tests/plain/printf_test.c -/* $FreeBSD$ +/* $FreeBSD$ */ + Index: sys/arm/arm/pl190.c - * Copyright (c) 2012 Oleksandr Tymoshenko + * Copyright (c) 2012-2017 Oleksandr Tymoshenko - +#include -#include +#include "pic_if.h" + +struct pl190_intc_irqsrc { + struct intr_irqsrc isrc; + u_int irq; +}; + - device_t sc_dev; + device_t dev; + struct mtx mtx; + struct pl190_intc_irqsrc isrcs[VIC_NIRQS]; -static struct pl190_intc_softc *pl190_intc_sc = NULL; +#define INTC_VIC_READ_4(sc, reg) \ + bus_read_4(sc->intc_res, (reg)) +#define INTC_VIC_WRITE_4(sc, reg, val) \ + bus_write_4(sc->intc_res, (reg), (val)) -#define intc_vic_read_4(reg) \ - bus_read_4(pl190_intc_sc->intc_res, (reg)) -#define intc_vic_write_4(reg, val) \ - bus_write_4(pl190_intc_sc->intc_res, (reg), (val)) +#define VIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx) +#define VIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx) +static inline void +pl190_intc_irq_dispatch(struct pl190_intc_softc *sc, u_int irq, + struct trapframe *tf) +{ + struct pl190_intc_irqsrc *src; + + src = &sc->isrcs[irq]; + if (intr_isrc_dispatch(&src->isrc, tf) != 0) + device_printf(sc->dev, "Stray irq %u detected\n", irq); +} + +pl190_intc_intr(void *arg) +{ + struct pl190_intc_softc *sc; + u_int cpu; + uint32_t num, pending; + struct trapframe *tf; + + sc = arg; + cpu = PCPU_GET(cpuid); + tf = curthread->td_intr_frame; + + VIC_LOCK(sc); + pending = INTC_VIC_READ_4(sc, VICIRQSTATUS); + VIC_UNLOCK(sc); + for (num = 0 ; num < VIC_NIRQS; num++) { + if (pending & (1 << num)) + pl190_intc_irq_dispatch(sc, num, tf); + } + + return (FILTER_HANDLED); +} + +static void +pl190_intc_disable_intr(device_t dev, struct intr_irqsrc *isrc) +{ + struct pl190_intc_softc *sc; + struct pl190_intc_irqsrc *src; + + sc = device_get_softc(dev); + src = (struct pl190_intc_irqsrc *)isrc; + + VIC_LOCK(sc); + INTC_VIC_WRITE_4(sc, VICINTENCLEAR, (1 << src->irq)); + VIC_UNLOCK(sc); +} + +static void +pl190_intc_enable_intr(device_t dev, struct intr_irqsrc *isrc) +{ + struct pl190_intc_softc *sc; + struct pl190_intc_irqsrc *src; + + sc = device_get_softc(dev); + src = (struct pl190_intc_irqsrc *)isrc; + + VIC_LOCK(sc); + INTC_VIC_WRITE_4(sc, VICINTENABLE, (1 << src->irq)); + VIC_UNLOCK(sc); +} + +static int +pl190_intc_map_intr(device_t dev, struct intr_map_data *data, + struct intr_irqsrc **isrcp) +{ + struct intr_map_data_fdt *daf; + struct pl190_intc_softc *sc; + + if (data->type != INTR_MAP_DATA_FDT) + return (ENOTSUP); + + daf = (struct intr_map_data_fdt *)data; + if (daf->ncells != 1 || daf->cells[0] >= VIC_NIRQS) + return (EINVAL); + + sc = device_get_softc(dev); + *isrcp = &sc->isrcs[daf->cells[0]].isrc; + return (0); +} + +static void +pl190_intc_pre_ithread(device_t dev, struct intr_irqsrc *isrc) +{ + pl190_intc_disable_intr(dev, isrc); +} + +static void +pl190_intc_post_ithread(device_t dev, struct intr_irqsrc *isrc) +{ + struct pl190_intc_irqsrc *src; + + src = (struct pl190_intc_irqsrc *)isrc; + pl190_intc_enable_intr(dev, isrc); + arm_irq_memory_barrier(src->irq); +} + +static void +pl190_intc_post_filter(device_t dev, struct intr_irqsrc *isrc) +{ + struct pl190_intc_irqsrc *src; + + src = (struct pl190_intc_irqsrc *)isrc; + arm_irq_memory_barrier(src->irq); +} + +static int +pl190_intc_setup_intr(device_t dev, struct intr_irqsrc *isrc, + struct resource *res, struct intr_map_data *data) +{ + + return (0); +} + +static int - struct pl190_intc_softc *sc = device_get_softc(dev); + struct pl190_intc_softc *sc; + struct pl190_intc_irqsrc *isrcs; + struct intr_pic *pic; + int error; + uint32_t irq; + const char *name; + phandle_t xref; - sc->sc_dev = dev; + sc = device_get_softc(dev); + sc->dev = dev; + mtx_init(&sc->mtx, device_get_nameunit(dev), "pl190", + MTX_SPIN); - if (pl190_intc_sc) - return (ENXIO); - - pl190_intc_sc = sc; - intc_vic_write_4(VICINTSELECT, 0x00000000); + INTC_VIC_WRITE_4(sc, VICINTSELECT, 0x00000000); - intc_vic_write_4(VICINTENCLEAR, 0xffffffff); - /* Enable INT31, SIC IRQ */ - intc_vic_write_4(VICINTENABLE, (1U << 31)); + INTC_VIC_WRITE_4(sc, VICINTENCLEAR, 0xffffffff); - (intc_vic_read_4(VICPERIPHID + i*4) & 0xff); + (INTC_VIC_READ_4(sc, VICPERIPHID + i*4) & 0xff); - (intc_vic_read_4(VICPRIMECELLID + i*4) & 0xff); + (INTC_VIC_READ_4(sc, VICPRIMECELLID + i*4) & 0xff); - return (0); + /* PIC attachment */ + isrcs = sc->isrcs; + name = device_get_nameunit(sc->dev); + for (irq = 0; irq < VIC_NIRQS; irq++) { + isrcs[irq].irq = irq; + error = intr_isrc_register(&isrcs[irq].isrc, sc->dev, + 0, "%s,%u", name, irq); + if (error != 0) + return (error); + } + + xref = OF_xref_from_node(ofw_bus_get_node(sc->dev)); + pic = intr_pic_register(sc->dev, xref); + if (pic == NULL) + return (ENXIO); + + return (intr_pic_claim_root(sc->dev, xref, pl190_intc_intr, sc, 0)); - { 0, 0 } + + DEVMETHOD(pic_disable_intr, pl190_intc_disable_intr), + DEVMETHOD(pic_enable_intr, pl190_intc_enable_intr), + DEVMETHOD(pic_map_intr, pl190_intc_map_intr), + DEVMETHOD(pic_post_filter, pl190_intc_post_filter), + DEVMETHOD(pic_post_ithread, pl190_intc_post_ithread), + DEVMETHOD(pic_pre_ithread, pl190_intc_pre_ithread), + DEVMETHOD(pic_setup_intr, pl190_intc_setup_intr), + + DEVMETHOD_END - -int -arm_get_next_irq(int last_irq) -{ - uint32_t pending; - int32_t irq = last_irq + 1; - - /* Sanity check */ - if (irq < 0) - irq = 0; - - pending = intc_vic_read_4(VICIRQSTATUS); - while (irq < VIC_NIRQS) { - if (pending & (1 << irq)) - return (irq); - irq++; - } - - return (-1); -} - -void -arm_mask_irq(uintptr_t nb) -{ - - dprintf("%s: %d\n", __func__, nb); - intc_vic_write_4(VICINTENCLEAR, (1 << nb)); -} - -void -arm_unmask_irq(uintptr_t nb) -{ - - dprintf("%s: %d\n", __func__, nb); - intc_vic_write_4(VICINTENABLE, (1 << nb)); -} Index: sys/arm/versatile/versatile_sic.c - * Copyright (c) 2012 Oleksandr Tymoshenko + * Copyright (c) 2012-2017 Oleksandr Tymoshenko - +#include -#include +#include "pic_if.h" + +#define SIC_NIRQS 32 + +struct versatile_sic_irqsrc { + struct intr_irqsrc isrc; + u_int irq; +}; + - device_t sc_dev; + device_t dev; + struct mtx mtx; + struct resource * irq_res; + void *intrh; + struct versatile_sic_irqsrc isrcs[SIC_NIRQS]; -#define sic_read_4(sc, reg) \ +#define SIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx) +#define SIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx) + +#define SIC_READ_4(sc, reg) \ -#define sic_write_4(sc, reg, val) \ +#define SIC_WRITE_4(sc, reg, val) \ +/* + * Driver stuff + */ +static int versatile_sic_probe(device_t); +static int versatile_sic_attach(device_t); +static int versatile_sic_detach(device_t); + +static void +versatile_sic_disable_intr(device_t dev, struct intr_irqsrc *isrc) +{ + struct versatile_sic_softc *sc; + struct versatile_sic_irqsrc *src; + + sc = device_get_softc(dev); + src = (struct versatile_sic_irqsrc *)isrc; + + SIC_LOCK(sc); + SIC_WRITE_4(sc, SIC_ENCLR, (1 << src->irq)); + SIC_UNLOCK(sc); +} + +static void +versatile_sic_enable_intr(device_t dev, struct intr_irqsrc *isrc) +{ + struct versatile_sic_softc *sc; + struct versatile_sic_irqsrc *src; + + sc = device_get_softc(dev); + src = (struct versatile_sic_irqsrc *)isrc; + + SIC_LOCK(sc); + SIC_WRITE_4(sc, SIC_ENSET, (1 << src->irq)); + SIC_UNLOCK(sc); +} + +versatile_sic_map_intr(device_t dev, struct intr_map_data *data, + struct intr_irqsrc **isrcp) +{ + struct intr_map_data_fdt *daf; + struct versatile_sic_softc *sc; + + if (data->type != INTR_MAP_DATA_FDT) + return (ENOTSUP); + + daf = (struct intr_map_data_fdt *)data; + if (daf->ncells != 1 || daf->cells[0] >= SIC_NIRQS) + return (EINVAL); + + sc = device_get_softc(dev); + *isrcp = &sc->isrcs[daf->cells[0]].isrc; + return (0); +} + +static void +versatile_sic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) +{ + versatile_sic_disable_intr(dev, isrc); +} + +static void +versatile_sic_post_ithread(device_t dev, struct intr_irqsrc *isrc) +{ + struct versatile_sic_irqsrc *src; + + src = (struct versatile_sic_irqsrc *)isrc; + arm_irq_memory_barrier(src->irq); + versatile_sic_enable_intr(dev, isrc); +} + +static void +versatile_sic_post_filter(device_t dev, struct intr_irqsrc *isrc) +{ + struct versatile_sic_irqsrc *src; + + src = (struct versatile_sic_irqsrc *)isrc; + arm_irq_memory_barrier(src->irq); +} + +static int +versatile_sic_setup_intr(device_t dev, struct intr_irqsrc *isrc, + struct resource *res, struct intr_map_data *data) +{ + + return (0); +} + +static int +versatile_sic_filter(void *arg) +{ + struct versatile_sic_softc *sc; + struct intr_irqsrc *isrc; + uint32_t i, interrupts; + + sc = arg; + SIC_LOCK(sc); + interrupts = SIC_READ_4(sc, SIC_STATUS); + SIC_UNLOCK(sc); + for (i = 0; interrupts != 0; i++, interrupts >>= 1) { + if ((interrupts & 0x1) == 0) + continue; + isrc = &sc->isrcs[i].isrc; + if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) { + versatile_sic_disable_intr(sc->dev, isrc); + versatile_sic_post_filter(sc->dev, isrc); + device_printf(sc->dev, "Stray irq %u disabled\n", i); + } + } + + return (FILTER_HANDLED); +} + +static int - uint32_t pass_irqs; - int rid; + int rid, error; + uint32_t irq; + const char *name; + struct versatile_sic_irqsrc *isrcs; - sc->sc_dev = dev; + sc->dev = dev; + mtx_init(&sc->mtx, device_get_nameunit(dev), "sic", + MTX_SPIN); + /* Request memory resources */ + rid = 0; + sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE); + if (sc->irq_res == NULL) { + device_printf(dev, "could not allocate IRQ resources\n"); + versatile_sic_detach(dev); + return (ENXIO); + } + + if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, + versatile_sic_filter, NULL, sc, &sc->intrh))) { + device_printf(dev, + "unable to register interrupt handler\n"); + versatile_sic_detach(dev); + return (ENXIO); + } + - sic_write_4(sc, SIC_ENCLR, 0xffffffff); + SIC_WRITE_4(sc, SIC_ENCLR, 0xffffffff); - /* - * XXX: Enable IRQ3 for KMI - * Should be replaced by proper interrupts cascading - */ - sic_write_4(sc, SIC_ENSET, (1 << 3)); + /* PIC attachment */ + isrcs = sc->isrcs; + name = device_get_nameunit(sc->dev); + for (irq = 0; irq < SIC_NIRQS; irq++) { + isrcs[irq].irq = irq; + error = intr_isrc_register(&isrcs[irq].isrc, sc->dev, + 0, "%s,%u", name, irq); + if (error != 0) + return (error); + } - /* - * Let PCI and Ethernet interrupts pass through - * IRQ25, IRQ27..IRQ31 - */ - pass_irqs = (0x1f << 27) | (1 << 25); - sic_write_4(sc, SIC_PICENSET, pass_irqs); + intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev))); +static int +versatile_sic_detach(device_t dev) +{ + struct versatile_sic_softc *sc; + + sc = device_get_softc(dev); + + if (sc->intrh) + bus_teardown_intr(dev, sc->irq_res, sc->intrh); + + if (sc->mem_res == NULL) + bus_release_resource(dev, SYS_RES_MEMORY, + rman_get_rid(sc->mem_res), sc->mem_res); + + if (sc->irq_res == NULL) + bus_release_resource(dev, SYS_RES_IRQ, + rman_get_rid(sc->irq_res), sc->irq_res); + + mtx_destroy(&sc->mtx); + + return (0); + +} + - { 0, 0 } + DEVMETHOD(device_detach, versatile_sic_detach), + + DEVMETHOD(pic_disable_intr, versatile_sic_disable_intr), + DEVMETHOD(pic_enable_intr, versatile_sic_enable_intr), + DEVMETHOD(pic_map_intr, versatile_sic_map_intr), + DEVMETHOD(pic_post_filter, versatile_sic_post_filter), + DEVMETHOD(pic_post_ithread, versatile_sic_post_ithread), + DEVMETHOD(pic_pre_ithread, versatile_sic_pre_ithread), + DEVMETHOD(pic_setup_intr, versatile_sic_setup_intr), + + DEVMETHOD_END Index: sys/dev/altera/atse/if_atse.c - * Copyright (c) 2012,2013 Bjoern A. Zeeb + * Copyright (c) 2012, 2013 Bjoern A. Zeeb + + + + + int leftm; - int leftm; - uint32_t x; + - x = val4; - /* + /* + uint32_t mask, val4; - uint32_t mask, val4; + uint8_t x, y; - uint8_t x, y; + + struct ifmultiaddr *ifma; - struct ifmultiaddr *ifma; - /* + /* - + + - int i; + int i; + + - /* + /* - + - /* Only enable interrupts if we are not polling. */ + /* Only enable interrupts if we are not polling. */ - - sc->atse_if_flags = ifp->if_flags; + sc->atse_if_flags = ifp->if_flags; -static int +static int + uint32_t fill, i, j; + uint32_t data, meta; - uint32_t fill, i, j; - uint32_t data, meta; - int rx_npkts = 0; + int rx_npkts; + rx_npkts = 0; - + - } + } - } + } - return (rx_npkts); + return (rx_npkts); - int error, offset, s; + int error, offset, s; - sc = arg1; + sc = arg1; - return (0); + return (0); -#define ATSE_RX_ERR_FIFO_THRES_EOP 0 /* FIFO threshold reached, on EOP. */ -#define ATSE_RX_ERR_ELEN 1 /* Frame/payload length not valid. */ -#define ATSE_RX_ERR_CRC32 2 /* CRC-32 error. */ -#define ATSE_RX_ERR_FIFO_THRES_TRUNC 3 /* FIFO thresh., truncated frame. */ -#define ATSE_RX_ERR_4 4 /* ? */ -#define ATSE_RX_ERR_5 5 /* / */ +#define ATSE_RX_ERR_FIFO_THRES_EOP 0 /* FIFO threshold reached, on EOP. */ +#define ATSE_RX_ERR_ELEN 1 /* Frame/payload length not valid. */ +#define ATSE_RX_ERR_CRC32 2 /* CRC-32 error. */ +#define ATSE_RX_ERR_FIFO_THRES_TRUNC 3 /* FIFO thresh., truncated frame. */ +#define ATSE_RX_ERR_4 4 /* ? */ +#define ATSE_RX_ERR_5 5 /* / */ - int error, offset, s; + int error, offset, s; - sc = arg1; + sc = arg1; - return (0); + return (0); - sctx = device_get_sysctl_ctx(dev); - soid = device_get_sysctl_tree(dev); + sctx = device_get_sysctl_ctx(dev); + soid = device_get_sysctl_tree(dev); - mii = device_get_softc(sc->atse_miibus); - ifp = sc->atse_ifp; - if (mii == NULL || ifp == NULL || - (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) - return; + mii = device_get_softc(sc->atse_miibus); + ifp = sc->atse_ifp; + if (mii == NULL || ifp == NULL || + (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + return; - if ((sc->atse_flags & ATSE_FLAGS_LINK) == 0) { + if ((sc->atse_flags & ATSE_FLAGS_LINK) == 0) { - return; - } + return; + } - else + else Index: sys/dev/altera/avgen/altera_avgen.c - * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2012-2013, 2016 Robert N. M. Watson +#include +#include + +#define ALTERA_AVGEN_DEVNAME "altera_avgen" +#define ALTERA_AVGEN_DEVNAME_FMT (ALTERA_AVGEN_DEVNAME "%d") + - .d_name = "altera_avgen", + .d_name = ALTERA_AVGEN_DEVNAME, +#define ALTERA_AVGEN_SECTORSIZE 512 /* Not configurable at this time. */ + +/* + * NB: We serialise block reads and writes in case the OS is generating + * concurrent I/O against the same block, in which case we want one I/O (or + * another) to win. This is not sufficient to provide atomicity for the + * sector in the presence of a fail stop -- however, we're just writing this + * to non-persistent DRAM .. right? + */ +static void +altera_avgen_disk_strategy(struct bio *bp) +{ + struct altera_avgen_softc *sc; + void *data; + long bcount; + daddr_t pblkno; + sc = bp->bio_disk->d_drv1; + data = bp->bio_data; + bcount = bp->bio_bcount; + pblkno = bp->bio_pblkno; + + /* + * Serialize block reads / writes. + */ + mtx_lock(&sc->avg_disk_mtx); + switch (bp->bio_cmd) { + case BIO_READ: + if (!(sc->avg_flags & ALTERA_AVALON_FLAG_GEOM_READ)) { + biofinish(bp, NULL, EIO); + break; + } + switch (sc->avg_width) { + case 1: + bus_read_region_1(sc->avg_res, + bp->bio_pblkno * ALTERA_AVGEN_SECTORSIZE, + (uint8_t *)data, bcount); + break; + + case 2: + bus_read_region_2(sc->avg_res, + bp->bio_pblkno * ALTERA_AVGEN_SECTORSIZE, + (uint16_t *)data, bcount / 2); + break; + + case 4: + bus_read_region_4(sc->avg_res, + bp->bio_pblkno * ALTERA_AVGEN_SECTORSIZE, + (uint32_t *)data, bcount / 4); + break; + + default: + panic("%s: unexpected width %u", __func__, + sc->avg_width); + } + break; + + case BIO_WRITE: + if (!(sc->avg_flags & ALTERA_AVALON_FLAG_GEOM_WRITE)) { + biofinish(bp, NULL, EROFS); + break; + } + switch (sc->avg_width) { + case 1: + bus_write_region_1(sc->avg_res, + bp->bio_pblkno * ALTERA_AVGEN_SECTORSIZE, + (uint8_t *)data, bcount); + break; + + case 2: + bus_write_region_2(sc->avg_res, + bp->bio_pblkno * ALTERA_AVGEN_SECTORSIZE, + (uint16_t *)data, bcount / 2); + break; + + case 4: + bus_write_region_4(sc->avg_res, + bp->bio_pblkno * ALTERA_AVGEN_SECTORSIZE, + (uint32_t *)data, bcount / 4); + break; + + default: + panic("%s: unexpected width %u", __func__, + sc->avg_width); + } + break; + + default: + panic("%s: unsupported I/O operation %d", __func__, + bp->bio_cmd); + } + mtx_unlock(&sc->avg_disk_mtx); + biofinish(bp, NULL, 0); +} + - const char *str_fileio, const char *str_mmapio, const char *str_devname, - int devunit) + const char *str_fileio, const char *str_geomio, const char *str_mmapio, + const char *str_devname, int devunit) - if (str_fileio == NULL && str_mmapio == NULL) { + if (str_fileio == NULL && str_geomio == NULL && str_mmapio == NULL) { - "at least one of %s or %s must be specified\n", - ALTERA_AVALON_STR_FILEIO, ALTERA_AVALON_STR_MMAPIO); + "at least one of %s, %s, or %s must be specified\n", + ALTERA_AVALON_STR_FILEIO, ALTERA_AVALON_STR_GEOMIO, + ALTERA_AVALON_STR_MMAPIO); + + /* + * Validity check: a device can either be a GEOM device (in which case + * we use GEOM to register the device node), or a special device -- + * but not both as that causes a collision in /dev. + */ + if (str_geomio != NULL && (str_fileio != NULL || str_mmapio != NULL)) { + device_printf(dev, + "at most one of %s and (%s or %s) may be specified\n", + ALTERA_AVALON_STR_GEOMIO, ALTERA_AVALON_STR_FILEIO, + ALTERA_AVALON_STR_MMAPIO); + return (ENXIO); + } + + /* + * Ensure that a unit is specified if a name is also specified. + */ + if (str_geomio != NULL) { + for (cp = str_geomio; *cp != '\0'; cp++){ + switch (*cp) { + case ALTERA_AVALON_CHAR_READ: + sc->avg_flags |= ALTERA_AVALON_FLAG_GEOM_READ; + break; + + case ALTERA_AVALON_CHAR_WRITE: + sc->avg_flags |= ALTERA_AVALON_FLAG_GEOM_WRITE; + break; + + default: + device_printf(dev, + "invalid %s character %c\n", + ALTERA_AVALON_STR_GEOMIO, *cp); + return (ENXIO); + } + } + } - const char *str_mmapio, const char *str_devname, int devunit) + const char *str_geomio, const char *str_mmapio, const char *str_devname, + int devunit) - error = altera_avgen_process_options(sc, str_fileio, str_mmapio, - str_devname, devunit); + error = altera_avgen_process_options(sc, str_fileio, str_geomio, + str_mmapio, str_devname, devunit); - /* Device node allocation. */ - if (str_devname == NULL) { - str_devname = "altera_avgen%d"; + /* + * If a GEOM permission is requested, then create the device via GEOM. + * Otherwise, create a special device. We checked during options + * processing that both weren't requested a once. + */ + if (str_devname != NULL) { + sc->avg_name = strdup(str_devname, M_TEMP); + } else + sc->avg_name = strdup(ALTERA_AVGEN_DEVNAME, M_TEMP); + if (sc->avg_flags & (ALTERA_AVALON_FLAG_GEOM_READ | + ALTERA_AVALON_FLAG_GEOM_WRITE)) { + mtx_init(&sc->avg_disk_mtx, "altera_avgen_disk", NULL, + MTX_DEF); + sc->avg_disk = disk_alloc(); + sc->avg_disk->d_drv1 = sc; + sc->avg_disk->d_strategy = altera_avgen_disk_strategy; + if (devunit == -1) + devunit = 0; + sc->avg_disk->d_name = sc->avg_name; + sc->avg_disk->d_unit = devunit; + + /* + * NB: As avg_res is a multiple of PAGE_SIZE, it is also a + * multiple of ALTERA_AVGEN_SECTORSIZE. + */ + sc->avg_disk->d_sectorsize = ALTERA_AVGEN_SECTORSIZE; + sc->avg_disk->d_mediasize = rman_get_size(sc->avg_res); + sc->avg_disk->d_maxsize = ALTERA_AVGEN_SECTORSIZE; + disk_create(sc->avg_disk, DISK_VERSION); + } else { + /* Device node allocation. */ + if (str_devname == NULL) { + str_devname = ALTERA_AVGEN_DEVNAME_FMT; + devunit = sc->avg_unit; + } + if (devunit != -1) + sc->avg_cdev = make_dev(&avg_cdevsw, sc->avg_unit, + UID_ROOT, GID_WHEEL, S_IRUSR | S_IWUSR, "%s%d", + str_devname, devunit); + else + sc->avg_cdev = make_dev(&avg_cdevsw, sc->avg_unit, + UID_ROOT, GID_WHEEL, S_IRUSR | S_IWUSR, + "%s", str_devname); + if (sc->avg_cdev == NULL) { + device_printf(sc->avg_dev, "%s: make_dev failed\n", + __func__); + return (ENXIO); + } + + /* XXXRW: Slight race between make_dev(9) and here. */ + sc->avg_cdev->si_drv1 = sc; - if (devunit != -1) - sc->avg_cdev = make_dev(&avg_cdevsw, sc->avg_unit, UID_ROOT, - GID_WHEEL, S_IRUSR | S_IWUSR, str_devname, devunit); - else - sc->avg_cdev = make_dev(&avg_cdevsw, sc->avg_unit, UID_ROOT, - GID_WHEEL, S_IRUSR | S_IWUSR, str_devname); - if (sc->avg_cdev == NULL) { - device_printf(sc->avg_dev, "%s: make_dev failed\n", __func__); - return (ENXIO); - } - /* XXXRW: Slight race between make_dev(9) and here. */ - sc->avg_cdev->si_drv1 = sc; - destroy_dev(sc->avg_cdev); + KASSERT((sc->avg_disk != NULL) || (sc->avg_cdev != NULL), + ("%s: neither GEOM nor special device", __func__)); + + if (sc->avg_disk != NULL) { + disk_gone(sc->avg_disk); + disk_destroy(sc->avg_disk); + free(sc->avg_name, M_TEMP); + mtx_destroy(&sc->avg_disk_mtx); + } else { + destroy_dev(sc->avg_cdev); + } Index: sys/dev/altera/avgen/altera_avgen.h - * Copyright (c) 2012 Robert N. M. Watson + * Copyright (c) 2012, 2016 Robert N. M. Watson + char *avg_name; + u_int avg_sectorsize; + + /* + * disk(9) state, if required for this device. + */ + struct disk *avg_disk; + struct mtx avg_disk_mtx; +#define ALTERA_AVALON_FLAG_GEOM_READ 0x20 +#define ALTERA_AVALON_FLAG_GEOM_WRITE 0x40 +#define ALTERA_AVALON_STR_GEOMIO "geomio" - const char *str_fileio, const char *str_mmapio, - const char *str_devname, int devunit); + const char *str_fileio, const char *str_geomio, + const char *str_mmapio, const char *str_devname, int devunit); Index: sys/dev/altera/avgen/altera_avgen_fdt.c - * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2012-2013, 2016 Robert N. M. Watson - char *str_fileio, *str_mmapio; + char *str_fileio, *str_geomio, *str_mmapio; + str_geomio = NULL; + (void)OF_getprop_alloc(node, "sri-cambridge,geomio", sizeof(char), + (void **)&str_geomio); - error = altera_avgen_attach(sc, str_fileio, str_mmapio, str_devname, - devunit); + error = altera_avgen_attach(sc, str_fileio, str_geomio, str_mmapio, + str_devname, devunit); + if (str_geomio != NULL) + OF_prop_free(str_geomio); Index: sys/dev/altera/avgen/altera_avgen_nexus.c - * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2012-2013, 2016 Robert N. M. Watson - const char *str_fileio, *str_mmapio; + const char *str_fileio, *str_geomio, *str_mmapio; + str_geomio = NULL; + device_get_unit(dev), ALTERA_AVALON_STR_GEOMIO, &str_geomio); + (void)resource_string_value(device_get_name(dev), - error = altera_avgen_attach(sc, str_fileio, str_mmapio, str_devname, - devunit); + error = altera_avgen_attach(sc, str_fileio, str_geomio, str_mmapio, + str_devname, devunit); Index: sys/dev/altera/jtag_uart/altera_jtag_uart_tty.c - * Copyright (c) 2011-2012 Robert N. M. Watson + * Copyright (c) 2011-2012, 2016 Robert N. M. Watson +#include +#include - * before assuming JTAG has disappeared on us. By default, two seconds. + * before assuming JTAG has disappeared on us. By default, four seconds. -#define AJU_JTAG_MAXMISS 10 +#define AJU_JTAG_MAXMISS 20 + * Statistics on JTAG removal events when sending, for debugging purposes + * only. + */ +static u_int aju_jtag_vanished; +SYSCTL_UINT(_debug, OID_AUTO, aju_jtag_vanished, CTLFLAG_RW, + &aju_jtag_vanished, 0, "Number of times JTAG has vanished"); + +static u_int aju_jtag_appeared; +SYSCTL_UINT(_debug, OID_AUTO, aju_jtag_appeared, CTLFLAG_RW, + &aju_jtag_appeared, 0, "Number of times JTAG has appeared"); + +SYSCTL_INT(_debug, OID_AUTO, aju_cons_jtag_present, CTLFLAG_RW, + &aju_cons_jtag_present, 0, "JTAG console present flag"); + +SYSCTL_UINT(_debug, OID_AUTO, aju_cons_jtag_missed, CTLFLAG_RW, + &aju_cons_jtag_missed, 0, "JTAG console missed counter"); + +/* + * Interrupt-related statistics. + */ +static u_int aju_intr_readable_enabled; +SYSCTL_UINT(_debug, OID_AUTO, aju_intr_readable_enabled, CTLFLAG_RW, + &aju_intr_readable_enabled, 0, "Number of times read interrupt enabled"); + +static u_int aju_intr_writable_disabled; +SYSCTL_UINT(_debug, OID_AUTO, aju_intr_writable_disabled, CTLFLAG_RW, + &aju_intr_writable_disabled, 0, + "Number of times write interrupt disabled"); + +static u_int aju_intr_writable_enabled; +SYSCTL_UINT(_debug, OID_AUTO, aju_intr_writable_enabled, CTLFLAG_RW, + &aju_intr_writable_enabled, 0, + "Number of times write interrupt enabled"); + +static u_int aju_intr_disabled; +SYSCTL_UINT(_debug, OID_AUTO, aju_intr_disabled, CTLFLAG_RW, + &aju_intr_disabled, 0, "Number of times write interrupt disabled"); + +static u_int aju_intr_read_count; +SYSCTL_UINT(_debug, OID_AUTO, aju_intr_read_count, CTLFLAG_RW, + &aju_intr_read_count, 0, "Number of times read interrupt fired"); + +static u_int aju_intr_write_count; +SYSCTL_UINT(_debug, OID_AUTO, aju_intr_write_count, CTLFLAG_RW, + &aju_intr_write_count, 0, "Number of times write interrupt fired"); + +/* + atomic_add_int(&aju_intr_readable_enabled, 1); + atomic_add_int(&aju_intr_writable_enabled, 1); + atomic_add_int(&aju_intr_writable_disabled, 1); + atomic_add_int(&aju_intr_disabled, 1); - v = aju_control_read(sc); - if ((v & ALTERA_JTAG_UART_CONTROL_WSPACE) != 0) { - AJU_UNLOCK(sc); - if (ttydisc_getc(tp, &ch, sizeof(ch)) != sizeof(ch)) - panic("%s: ttydisc_getc", __func__); - AJU_LOCK(sc); - + if (*sc->ajus_jtag_presentp == 0) { - * XXXRW: There is a slight race here in which we test - * for writability, drop the lock, get the character - * from the tty layer, re-acquire the lock, and then - * write. It's possible for other code -- - * specifically, the low-level console -- to have - * written in the mean time, which might mean that - * there is no longer space. The BERI memory bus will - * cause this write to block, wedging the processor - * until space is available -- which could be a while - * if JTAG is not attached! - * - * The 'easy' fix is to drop the character if WSPACE - * has become unset. Not sure what the 'hard' fix is. - */ - aju_data_write(sc, ch); - } else { - /* - if (*sc->ajus_jtag_presentp == 0) { - if (ttydisc_getc(tp, &ch, sizeof(ch)) != - sizeof(ch)) - panic("%s: ttydisc_getc 2", __func__); - AJU_UNLOCK(sc); - continue; - } - if (sc->ajus_irq_res != NULL) + AJU_UNLOCK(sc); + if (ttydisc_getc(tp, &ch, sizeof(ch)) != + sizeof(ch)) + panic("%s: ttydisc_getc", __func__); + continue; + } + v = aju_control_read(sc); + if ((v & ALTERA_JTAG_UART_CONTROL_WSPACE) == 0) { + if (sc->ajus_irq_res != NULL && + (v & ALTERA_JTAG_UART_CONTROL_WE) == 0) + if (ttydisc_getc(tp, &ch, sizeof(ch)) != sizeof(ch)) + panic("%s: ttydisc_getc 2", __func__); + AJU_LOCK(sc); + + /* + * XXXRW: There is a slight race here in which we test for + * writability, drop the lock, get the character from the tty + * layer, re-acquire the lock, and then write. It's possible + * for other code -- specifically, the low-level console -- to + * have* written in the mean time, which might mean that there + * is no longer space. The BERI memory bus will cause this + * write to block, wedging the processor until space is + * available -- which could be a while if JTAG is not + * attached! + * + * The 'easy' fix is to drop the character if WSPACE has + * become unset. Not sure what the 'hard' fix is. + */ + aju_data_write(sc, ch); + AJU_UNLOCK(sc); - aju_intr_writable_disable(sc); + + /* + * If interrupts are configured, and there's no data to write, but we + * had previously enabled write interrupts, disable them now. + */ + v = aju_control_read(sc); + if (sc->ajus_irq_res != NULL && (v & ALTERA_JTAG_UART_CONTROL_WE) != 0) + aju_intr_writable_disable(sc); - *sc->ajus_jtag_missedp = 0; + atomic_add_int(&aju_jtag_appeared, 1); + + /* Any hit eliminates all recent misses. */ + *sc->ajus_jtag_missedp = 0; - (*sc->ajus_jtag_missedp)++; - if (*sc->ajus_jtag_missedp >= AJU_JTAG_MAXMISS) { + /* + * If we've exceeded our tolerance for misses, mark JTAG as + * disconnected and drain output. Otherwise, bump the miss + * counter. + */ + if (*sc->ajus_jtag_missedp > AJU_JTAG_MAXMISS) { + atomic_add_int(&aju_jtag_vanished, 1); - } + } else + (*sc->ajus_jtag_missedp)++; - if (v & ALTERA_JTAG_UART_CONTROL_RI) + if (v & ALTERA_JTAG_UART_CONTROL_RI) { + atomic_add_int(&aju_intr_read_count, 1); - if (v & ALTERA_JTAG_UART_CONTROL_WI) + } + if (v & ALTERA_JTAG_UART_CONTROL_WI) { + atomic_add_int(&aju_intr_write_count, 1); + } Index: sys/dev/arcmsr/arcmsr.c +** Index: sys/dev/arcmsr/arcmsr.h +** Index: sys/dev/cfe/cfe_ioctl.h -/* $NetBSD: cfe_ioctl.h,v 1.2 2003/02/07 17:52:08 cgd Exp $ */ - - * Copyright 2000, 2001 + * Copyright 2000, 2001, 2002, 2003 - * This software is furnished under license and may be used and copied only - * in accordance with the following terms and conditions. Subject to these - * conditions, you may download, copy, install, use, modify and distribute - * modified or unmodified copies of this software in source and/or binary - * form. No title or ownership is transferred hereby. + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. - * Author: Mitch Lichtenberg (mpl@broadcom.com) + * Author: Mitch Lichtenberg -#define IOCTL_FLASH_ERASE_ALL 4 /* Erase the entire flash */ +#define IOCTL_FLASH_ERASE_ALL 4 /* Erase the entire flash */ +#define IOCTL_FLASH_WRITE_ALL 5 /* write entire flash */ +#define IOCTL_FLASH_GETINFO 6 /* get flash device info */ +#define IOCTL_FLASH_GETSECTORS 7 /* get sector information */ +#define IOCTL_FLASH_ERASE_RANGE 8 /* erase range of bytes */ +#define IOCTL_NVRAM_UNLOCK 9 /* allow r/w beyond logical end of device */ +#define IOCTL_FLASH_PROTECT_RANGE 10 /* Protect a group of sectors */ +#define IOCTL_FLASH_UNPROTECT_RANGE 11 /* unprotect a group of sectors */ +#define IOCTL_FLASH_DATA_WIDTH_MODE 12 /* switch flash and gen bus to support 8 or 16-bit mode I/Os */ +#define IOCTL_FLASH_BURST_MODE 13 /* configure gen bus for burst mode */ +typedef struct flash_range_s { + unsigned int range_base; + unsigned int range_length; +} flash_range_t; + +typedef struct flash_info_s { + unsigned long long flash_base; /* flash physical base address */ + unsigned int flash_size; /* available device size in bytes */ + unsigned int flash_type; /* type, from FLASH_TYPE below */ + unsigned int flash_flags; /* Various flags (FLASH_FLAG_xxx) */ +} flash_info_t; + +typedef struct flash_sector_s { + int flash_sector_idx; + int flash_sector_status; + unsigned int flash_sector_offset; + unsigned int flash_sector_size; +} flash_sector_t; + +#define FLASH_SECTOR_OK 0 +#define FLASH_SECTOR_INVALID -1 + +#define FLASH_TYPE_UNKNOWN 0 /* not sure what kind of flash */ +#define FLASH_TYPE_SRAM 1 /* not flash: it's SRAM */ +#define FLASH_TYPE_ROM 2 /* not flash: it's ROM */ +#define FLASH_TYPE_FLASH 3 /* it's flash memory of some sort */ + +#define FLASH_FLAG_NOERASE 1 /* Byte-range writes supported, + Erasing is not necessary */ + - int nvram_offset; /* offset of environment area */ - int nvram_size; /* size of environment area */ - int nvram_eraseflg; /* true if we need to erase first */ + int nvram_offset; /* offset of environment area */ + int nvram_size; /* size of environment area */ + int nvram_eraseflg; /* true if we need to erase first */ -#define IOCTL_ETHER_GETHWADDR 1 +#define IOCTL_ETHER_GETHWADDR 1 /* Get hardware address (6bytes) */ +#define IOCTL_ETHER_SETHWADDR 2 /* Set hardware address (6bytes) */ +#define IOCTL_ETHER_GETSPEED 3 /* Get Speed and Media (int) */ +#define IOCTL_ETHER_SETSPEED 4 /* Set Speed and Media (int) */ +#define IOCTL_ETHER_GETLINK 5 /* get link status (int) */ +#define IOCTL_ETHER_GETLOOPBACK 7 /* get loopback state */ +#define IOCTL_ETHER_SETLOOPBACK 8 /* set loopback state */ +#define IOCTL_ETHER_SETPACKETFIFO 9 /* set packet fifo mode (int) */ +#define IOCTL_ETHER_SETSTROBESIG 10 /* set strobe signal (int) */ +#define ETHER_LOOPBACK_OFF 0 /* no loopback */ +#define ETHER_LOOPBACK_INT 1 /* Internal loopback */ +#define ETHER_LOOPBACK_EXT 2 /* External loopback (through PHY) */ + +#define ETHER_SPEED_AUTO 0 /* Auto detect */ +#define ETHER_SPEED_UNKNOWN 0 /* Speed not known (on link status) */ +#define ETHER_SPEED_10HDX 1 /* 10MB hdx and fdx */ +#define ETHER_SPEED_10FDX 2 +#define ETHER_SPEED_100HDX 3 /* 100MB hdx and fdx */ +#define ETHER_SPEED_100FDX 4 +#define ETHER_SPEED_1000HDX 5 /* 1000MB hdx and fdx */ +#define ETHER_SPEED_1000FDX 6 + +#define ETHER_FIFO_8 0 /* 8-bit packet fifo mode */ +#define ETHER_FIFO_16 1 /* 16-bit packet fifo mode */ +#define ETHER_ETHER 2 /* Standard ethernet mode */ + +#define ETHER_STROBE_GMII 0 /* GMII style strobe signal */ +#define ETHER_STROBE_ENCODED 1 /* Encoded */ +#define ETHER_STROBE_SOP 2 /* SOP flagged. Only in 8-bit mode*/ +#define ETHER_STROBE_EOP 3 /* EOP flagged. Only in 8-bit mode*/ + + * Serial Ports + ********************************************************************* */ + +#define IOCTL_SERIAL_SETSPEED 1 /* get baud rate (int) */ +#define IOCTL_SERIAL_GETSPEED 2 /* set baud rate (int) */ +#define IOCTL_SERIAL_SETFLOW 3 /* Set Flow Control */ +#define IOCTL_SERIAL_GETFLOW 4 /* Get Flow Control */ + +#define SERIAL_FLOW_NONE 0 /* no flow control */ +#define SERIAL_FLOW_SOFTWARE 1 /* software flow control (not impl) */ +#define SERIAL_FLOW_HARDWARE 2 /* hardware flow control */ + +/* ********************************************************************* -#define IOCTL_BLOCK_GETBLOCKSIZE 1 -#define IOCTL_BLOCK_GETTOTALBLOCKS 2 +#define IOCTL_BLOCK_GETBLOCKSIZE 1 /* get block size (int) */ +#define IOCTL_BLOCK_GETTOTALBLOCKS 2 /* get total bocks (long long) */ +#define IOCTL_BLOCK_GETDEVTYPE 3 /* get device type (struct) */ + +typedef struct blockdev_info_s { + unsigned long long blkdev_totalblocks; + unsigned int blkdev_blocksize; + unsigned int blkdev_devtype; +} blockdev_info_t; + +#define BLOCK_DEVTYPE_DISK 0 +#define BLOCK_DEVTYPE_CDROM 1 Index: sys/dev/sound/pci/hda/hdaa.h -/*-7 Index: sys/dev/sound/pci/hdspe-pcm.c - * Copyright (c) 2012 Ruslan Bukin + * Copyright (c) 2012-2016 Ruslan Bukin - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; - int offs = 0; + struct sc_pcminfo *scp; + struct sc_info *sc; + int offs; + scp = ch->parent; + sc = scp->sc; + + offs = 0; - return 0; + return (0); - return 0; + return (0); - struct sc_pcminfo *scp = mix_getdevinfo(m); - struct sc_info *sc = scp->sc; + struct sc_pcminfo *scp; + struct sc_info *sc; + scp = mix_getdevinfo(m); + sc = scp->sc; - return -1; + return (-1); - return 0; + return (0); - struct sc_pcminfo *scp = mix_getdevinfo(m); + struct sc_pcminfo *scp; + scp = mix_getdevinfo(m); + - left,right); + left, right); - return 0; + return (0); - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; + struct sc_pcminfo *scp; + struct sc_info *sc; + scp = ch->parent; + sc = scp->sc; + - int i, j, devcount, err; + int devcount; + int i, j; + int err; - return 0; + + return (0); - device_printf(sc->dev,"hdspe is running\n"); + device_printf(sc->dev, "hdspe is running\n"); - return 1; + + return (1); - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; - int length,src,dst; + struct sc_pcminfo *scp; + struct sc_info *sc; + int src, dst; + int length; + scp = ch->parent; + sc = scp->sc; + -clean(struct sc_chinfo *ch){ - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; - uint32_t *buf = sc->rbuf; +clean(struct sc_chinfo *ch) +{ + struct sc_pcminfo *scp; + struct sc_info *sc; + uint32_t *buf; + scp = ch->parent; + sc = scp->sc; + buf = sc->rbuf; + - return 0; + return (0); - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) - struct sc_pcminfo *scp = devinfo; - struct sc_info *sc = scp->sc; + struct sc_pcminfo *scp; + struct sc_info *sc; + scp = devinfo; + sc = scp->sc; + - return NULL; + return (NULL); - return ch; + return (ch); - struct sc_chinfo *ch = data; - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; + struct sc_pcminfo *scp; + struct sc_chinfo *ch; + struct sc_info *sc; + ch = data; + scp = ch->parent; + sc = scp->sc; + - return 0; + return (0); - struct sc_chinfo *ch = data; - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; + struct sc_pcminfo *scp; + struct sc_chinfo *ch; + struct sc_info *sc; + ch = data; + scp = ch->parent; + sc = scp->sc; + - return pos; + return (pos); - struct sc_chinfo *ch = data; - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; + struct sc_pcminfo *scp; + struct sc_chinfo *ch; + struct sc_info *sc; + ch = data; + scp = ch->parent; + sc = scp->sc; + + - return 0; + return (0); - struct sc_chinfo *ch = data; + struct sc_chinfo *ch; + ch = data; + - return 0; + return (0); - struct sc_chinfo *ch = data; - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; - struct hdspe_rate *hr = NULL; + struct sc_pcminfo *scp; + struct hdspe_rate *hr; + struct sc_chinfo *ch; + struct sc_info *sc; + ch = data; + scp = ch->parent; + sc = scp->sc; + hr = NULL; + - return sc->speed; + + return (sc->speed); - struct sc_chinfo *ch = data; - struct sc_pcminfo *scp = ch->parent; - struct sc_info *sc = scp->sc; - struct hdspe_latency *hl = NULL; + struct hdspe_latency *hl; + struct sc_pcminfo *scp; + struct sc_chinfo *ch; + struct sc_info *sc; + ch = data; + scp = ch->parent; + sc = scp->sc; + hl = NULL; + - return sndbuf_getblksz(ch->buffer); + + return (sndbuf_getblksz(ch->buffer)); - struct sc_chinfo *ch = data; + struct sc_chinfo *ch; + ch = data; + - return (ch->dir == PCMDIR_PLAY) ? - &hdspe_pcaps : &hdspe_rcaps; + return ((ch->dir == PCMDIR_PLAY) ? + &hdspe_pcaps : &hdspe_rcaps); - return 0; + return (0); -hdspe_pcm_intr(struct sc_pcminfo *scp) { +hdspe_pcm_intr(struct sc_pcminfo *scp) +{ - struct sc_info *sc = scp->sc; + struct sc_info *sc; + sc = scp->sc; + - return 0; + return (0); + char status[SND_STATUSLEN]; - char status[SND_STATUSLEN]; - return ENXIO; + return (ENXIO); - return 0; + return (0); - return err; + return (err); - return 0; + return (0); Index: sys/dev/sound/pci/hdspe.c - * Copyright (c) 2012 Ruslan Bukin + * Copyright (c) 2012-2016 Ruslan Bukin - struct sc_info *sc = (struct sc_info *)p; + struct sc_info *sc; - int devcount, status; - int i, err; + int devcount; + int status; + int err; + int i; + sc = (struct sc_info *)p; + + struct sc_info *sc; + + sc = (struct sc_info *)arg; + - struct sc_info *sc = (struct sc_info *)arg; + - - uint32_t paddr,raddr; + uint32_t paddr, raddr; - return 0; + return (0); - return 0; + return (0); - return 0; + return (0); + struct hdspe_channel *chan_map; + struct sc_pcminfo *scp; - struct sc_pcminfo *scp; - struct hdspe_channel *chan_map; - return ENXIO; + return (ENXIO); - return ENXIO; + return (ENXIO); - return ENXIO; + return (ENXIO); - return 0; + return (0); - return 0; + return (0); Index: sys/mips/alchemy/aureg.h + * $FreeBSD$ Index: sys/mips/atheros/ar71xx_bus_space_reversed.h + * $FreeBSD$ Index: sys/mips/atheros/ar71xx_pci_bus_space.h + * $FreeBSD$ Index: sys/mips/beri/beri_pic.c + * Copyright (c) 2017 Ruslan Bukin +#include "opt_platform.h" + +#include -#include +#include +#ifdef SMP +#include +#endif + +#include +#include -#include +#include "pic_if.h" -#include "fdt_ic_if.h" +#define BP_NUM_HARD_IRQS 5 +#define BP_NUM_IRQS 32 +/* We use hard irqs 15-31 as soft */ +#define BP_FIRST_SOFT 16 -struct beripic_softc; +#define BP_CFG_IRQ_S 0 +#define BP_CFG_IRQ_M (0xf << BP_CFG_IRQ_S) +#define BP_CFG_TID_S 8 +#define BP_CFG_TID_M (0x7FFFFF << BP_CFG_TID_S) +#define BP_CFG_ENABLE (1 << 31) -static uint64_t bp_read_cfg(struct beripic_softc *, int); -static void bp_write_cfg(struct beripic_softc *, int, uint64_t); -static void bp_detach_resources(device_t); -static char *bp_strconfig(uint64_t, char *, size_t); -static void bp_config_source(device_t, int, int, u_long, u_long); -#ifdef __mips__ -static void bp_set_counter_name(device_t, device_t, int); -#endif +enum { + BP_CFG, + BP_IP_READ, + BP_IP_SET, + BP_IP_CLEAR +}; -static int beripic_fdt_probe(device_t); -static int beripic_fdt_attach(device_t); +struct beripic_softc; -static int beripic_activate_intr(device_t, struct resource *); -static struct resource * - beripic_alloc_intr(device_t, device_t, int *, u_long, u_int); -static int beripic_config_intr(device_t, int, enum intr_trigger, - enum intr_polarity); -static int beripic_release_intr(device_t, struct resource *); -static int beripic_setup_intr(device_t, device_t, struct resource *, - int, driver_filter_t *, driver_intr_t *, void *, void **); -static int beripic_teardown_intr(device_t, device_t, struct resource *, - void *); +struct beri_pic_isrc { + struct intr_irqsrc isrc; + u_int irq; + uint32_t mips_hard_irq; +}; -static int beripic_filter(void *); -static void beripic_intr(void *); +struct hirq { + uint32_t irq; + struct beripic_softc *sc; +}; -#define BP_MAX_HARD_IRQS 6 -#define BP_FIRST_SOFT 64 - - device_t bp_dev; - struct resource *bp_cfg_res; - struct resource *bp_read_res; - struct resource *bp_set_res; - struct resource *bp_clear_res; - int bp_cfg_rid; - int bp_read_rid; - int bp_set_rid; - int bp_clear_rid; - bus_space_tag_t bp_cfg_bst; - bus_space_tag_t bp_read_bst; - bus_space_tag_t bp_set_bst; - bus_space_tag_t bp_clear_bst; - bus_space_handle_t bp_cfg_bsh; - bus_space_handle_t bp_read_bsh; - bus_space_handle_t bp_set_bsh; - bus_space_handle_t bp_clear_bsh; - - struct resource *bp_irqs[BP_MAX_HARD_IRQS]; - int bp_irq_rids[BP_MAX_HARD_IRQS]; - int bp_nirqs; - int bp_next_irq; - int bp_next_tid; - - int bp_nthreads; - - int bp_nhard; - int bp_nsoft; - int bp_nsrcs; - struct rman bp_src_rman; - -#ifdef __mips__ - mips_intrcnt_t *bp_counters; -#endif - - struct mtx bp_cfgmtx; + device_t dev; + uint32_t nirqs; + struct beri_pic_isrc irqs[BP_NUM_IRQS]; + struct resource *res[4 + BP_NUM_HARD_IRQS]; + void *ih[BP_NUM_HARD_IRQS]; + struct hirq hirq[BP_NUM_HARD_IRQS]; + uint8_t mips_hard_irq_idx; -struct beripic_intr_arg { - driver_filter_t *filter; - driver_intr_t *intr; - void *arg; - struct resource *irq; -#ifdef __mips__ - mips_intrcnt_t counter; -#endif +static struct resource_spec beri_pic_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_MEMORY, 1, RF_ACTIVE }, + { SYS_RES_MEMORY, 2, RF_ACTIVE }, + { SYS_RES_MEMORY, 3, RF_ACTIVE }, + { SYS_RES_IRQ, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 1, RF_ACTIVE }, + { SYS_RES_IRQ, 2, RF_ACTIVE }, + { SYS_RES_IRQ, 3, RF_ACTIVE }, + { SYS_RES_IRQ, 4, RF_ACTIVE }, + { -1, 0 } -struct beripic_cookie { - struct beripic_intr_arg *bpia; - struct resource *hirq; - void *cookie; -}; - -#define BP_CFG_MASK_E 0x80000000ull -#define BP_CFG_SHIFT_E 31 -#define BP_CFG_MASK_TID 0x7FFFFF00ull /* Depends on CPU */ -#define BP_CFG_SHIFT_TID 8 -#define BP_CFG_MASK_IRQ 0x0000000Full -#define BP_CFG_SHIFT_IRQ 0 -#define BP_CFG_VALID (BP_CFG_MASK_E|BP_CFG_MASK_TID|BP_CFG_MASK_IRQ) -#define BP_CFG_RESERVED ~BP_CFG_VALID - -#define BP_CFG_ENABLED(cfg) (((cfg) & BP_CFG_MASK_E) >> BP_CFG_SHIFT_E) -#define BP_CFG_TID(cfg) (((cfg) & BP_CFG_MASK_TID) >> BP_CFG_SHIFT_TID) -#define BP_CFG_IRQ(cfg) (((cfg) & BP_CFG_MASK_IRQ) >> BP_CFG_SHIFT_IRQ) - -MALLOC_DEFINE(M_BERIPIC, "beripic", "beripic memory"); - -static uint64_t -bp_read_cfg(struct beripic_softc *sc, int irq) +static int +beri_pic_intr(void *arg) - - KASSERT((irq >= 0 && irq < sc->bp_nsrcs), - ("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1)); - return (bus_space_read_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8)); -} - -static void -bp_write_cfg(struct beripic_softc *sc, int irq, uint64_t config) -{ - - KASSERT((irq >= 0 && irq < sc->bp_nsrcs), - ("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1)); - bus_space_write_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8, config); -} - -static void -bp_detach_resources(device_t dev) -{ + struct intr_irqsrc *isrc; + struct hirq *h; + uint64_t intr; + uint64_t reg; - sc = device_get_softc(dev); + h = arg; + sc = h->sc; - if (sc->bp_cfg_res != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_cfg_rid, - sc->bp_cfg_res); - sc->bp_cfg_res = NULL; - } - if (sc->bp_read_res != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_read_rid, - sc->bp_read_res); - sc->bp_read_res = NULL; - } - if (sc->bp_set_res != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_set_rid, - sc->bp_set_res); - sc->bp_set_res = NULL; - } - if (sc->bp_clear_res != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_clear_rid, - sc->bp_clear_res); - sc->bp_clear_res = NULL; - } - for (i = sc->bp_nirqs - 1; i >= 0; i--) { - bus_release_resource(dev, SYS_RES_IRQ, sc->bp_irq_rids[i], - sc->bp_irqs[i]); - } - sc->bp_nirqs = 0; -} + intr = bus_read_8(sc->res[BP_IP_READ], 0); + while ((i = fls(intr)) != 0) { + i--; + intr &= ~(1u << i); -static char * -bp_strconfig(uint64_t config, char *configstr, size_t len) -{ - - if (snprintf(configstr, len, "%s tid: %llu hardintr %llu", - BP_CFG_ENABLED(config) ? "enabled" : "disabled", - BP_CFG_TID(config), BP_CFG_IRQ(config)) > len - 1) - return (NULL); - return (configstr); -} + isrc = &sc->irqs[i].isrc; -static void -bp_config_source(device_t ic, int src, int enable, u_long tid, u_long irq) -{ - struct beripic_softc *sc; - uint64_t config; + reg = bus_read_8(sc->res[BP_CFG], i * 8); + if ((reg & BP_CFG_IRQ_M) != h->irq) { + continue; + } + if ((reg & (BP_CFG_ENABLE)) == 0) { + continue; + } - sc = device_get_softc(ic); + if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) { + device_printf(sc->dev, "Stray interrupt %u detected\n", i); + } - config = 0; - config |= enable << BP_CFG_SHIFT_E; - config |= tid << BP_CFG_SHIFT_TID; - config |= irq << BP_CFG_SHIFT_IRQ; + bus_write_8(sc->res[BP_IP_CLEAR], 0, (1 << i)); + } - bp_write_cfg(sc, src, config); + return (FILTER_HANDLED); -#ifdef __mips__ -static void -bp_set_counter_name(device_t ic, device_t child, int src) -{ - struct beripic_softc *sc; - char name[MAXCOMLEN + 1]; - - sc = device_get_softc(ic); - - if (snprintf(name, sizeof(name), "bp%dsrc%d%s%s%s", - device_get_unit(ic), src, src < sc->bp_nhard ? "" : "s", - child == NULL ? "" : " ", - child == NULL ? " " : device_get_nameunit(child)) >= sizeof(name)) - name[sizeof(name) - 2] = '+'; - - mips_intrcnt_setname(sc->bp_counters[src], name); -} -#endif - -beripic_fdt_probe(device_t dev) +beripic_probe(device_t dev) + -beripic_fdt_attach(device_t dev) +beripic_attach(device_t dev) - char configstr[64]; - struct fdt_ic *fic; - pcell_t nhard, nsoft; - phandle_t ph; - int error, i, src; - uint64_t config; + struct beri_pic_isrc *pic_isrc; + const char *name; + struct intr_irqsrc *isrc; + intptr_t xref; + uint32_t unit; + int err; + int i; - sc->bp_dev = dev; + sc->dev = dev; - mtx_init(&sc->bp_cfgmtx, "beripic config lock", NULL, MTX_DEF); - - /* - * FDT lists CONFIG, IP_READ, IP_SET, and IP_CLEAR registers as - * seperate memory regions in that order. - */ - sc->bp_cfg_rid = 0; - sc->bp_cfg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->bp_cfg_rid, RF_ACTIVE); - if (sc->bp_cfg_res == NULL) { - device_printf(dev, "failed to map config memory"); - error = ENXIO; - goto err; + if (bus_alloc_resources(dev, beri_pic_spec, sc->res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); - if (bootverbose) - device_printf(sc->bp_dev, "config region at mem %p-%p\n", - (void *)rman_get_start(sc->bp_cfg_res), - (void *)(rman_get_start(sc->bp_cfg_res) + - rman_get_size(sc->bp_cfg_res))); - sc->bp_read_rid = 1; - sc->bp_read_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->bp_read_rid, RF_ACTIVE); - if (sc->bp_read_res == NULL) { - device_printf(dev, "failed to map IP read memory"); - error = ENXIO; - goto err; - } - if (bootverbose) - device_printf(sc->bp_dev, "IP read region at mem %p-%p\n", - (void *)rman_get_start(sc->bp_read_res), - (void *)(rman_get_start(sc->bp_read_res) + - rman_get_size(sc->bp_read_res))); + xref = OF_xref_from_node(ofw_bus_get_node(dev)); + name = device_get_nameunit(dev); + unit = device_get_unit(dev); + sc->nirqs = BP_NUM_IRQS; - sc->bp_set_rid = 2; - sc->bp_set_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->bp_set_rid, RF_ACTIVE); - if (sc->bp_set_res == NULL) { - device_printf(dev, "failed to map IP read memory"); - error = ENXIO; - goto err; - } - if (bootverbose) - device_printf(sc->bp_dev, "IP set region at mem %p-%p\n", - (void *)rman_get_start(sc->bp_set_res), - (void *)(rman_get_start(sc->bp_set_res) + - rman_get_size(sc->bp_set_res))); + for (i = 0; i < sc->nirqs; i++) { + sc->irqs[i].irq = i; + isrc = &sc->irqs[i].isrc; - sc->bp_clear_rid = 3; - sc->bp_clear_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->bp_clear_rid, RF_ACTIVE); - if (sc->bp_clear_res == NULL) { - device_printf(dev, "failed to map IP read memory"); - error = ENXIO; - goto err; - } - if (bootverbose) - device_printf(sc->bp_dev, "IP clear region at mem %p-%p\n", - (void *)rman_get_start(sc->bp_clear_res), - (void *)(rman_get_start(sc->bp_clear_res) + - rman_get_size(sc->bp_clear_res))); + /* Assign mips hard irq number. */ + pic_isrc = (struct beri_pic_isrc *)isrc; + pic_isrc->mips_hard_irq = sc->mips_hard_irq_idx++; + /* Last IRQ is used for IPIs. */ + if (sc->mips_hard_irq_idx >= (BP_NUM_HARD_IRQS - 1)) { + sc->mips_hard_irq_idx = 0; + } - i = 0; - for (i = 0; i < BP_MAX_HARD_IRQS; i++) { - sc->bp_irq_rids[i] = i; - sc->bp_irqs[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &sc->bp_irq_rids[i], RF_ACTIVE | RF_SHAREABLE); - if (sc->bp_irqs[i] == NULL) - break; + err = intr_isrc_register(isrc, sc->dev, + 0, "pic%d,%d", unit, i); + bus_write_8(sc->res[BP_CFG], i * 8, 0); - if (i == 0) { - device_printf(dev, "failed to allocate any parent IRQs!"); - error = ENXIO; - goto err; - } - sc->bp_nirqs = i; - ph = ofw_bus_gen_get_node(device_get_parent(dev), dev); - -#ifndef SMP - sc->bp_nthreads = 1; -#else - sc->bp_nthreads = 1; - /* XXX: get nthreads from cpu(s) somehow */ -#endif - - if (OF_getprop(ph, "hard-interrupt-sources", &nhard, sizeof(nhard)) - <= 0) { - device_printf(dev, "failed to get number of hard sources"); - error = ENXIO; - goto err; + /* + * Now, when everything is initialized, it's right time to + * register interrupt controller to interrupt framefork. + */ + if (intr_pic_register(dev, xref) == NULL) { + device_printf(dev, "could not register PIC\n"); + return (ENXIO); - if (OF_getprop(ph, "soft-interrupt-sources", &nsoft, sizeof(nsoft)) - <= 0) { - device_printf(dev, "failed to get number of soft sources"); - error = ENXIO; - goto err; - } - sc->bp_nhard = nhard; - sc->bp_nsoft = nsoft; - sc->bp_nsrcs = sc->bp_nhard + sc->bp_nsoft; - /* XXX: should deal with gap between hard and soft */ - KASSERT(sc->bp_nhard <= BP_FIRST_SOFT, - ("too many hard sources")); - KASSERT(rman_get_size(sc->bp_cfg_res) / 8 == sc->bp_nsrcs, - ("config space size does not match sources")); - KASSERT(sc->bp_nhard % 64 == 0, - ("Non-multiple of 64 intr counts not supported")); - KASSERT(sc->bp_nsoft % 64 == 0, - ("Non-multiple of 64 intr counts not supported")); - if (bootverbose) - device_printf(dev, "%d hard and %d soft sources\n", - sc->bp_nhard, sc->bp_nsoft); - -#ifdef __mips__ - sc->bp_counters = malloc(sizeof(*sc->bp_counters) * sc->bp_nsrcs, - M_BERIPIC, M_WAITOK|M_ZERO); - for (i = 0; i < sc->bp_nsrcs; i++) { - sc->bp_counters[i] = mips_intrcnt_create(""); - bp_set_counter_name(dev, NULL, i); - } -#endif - - sc->bp_src_rman.rm_start = 0; - sc->bp_src_rman.rm_end = sc->bp_nsrcs - 1; - sc->bp_src_rman.rm_type = RMAN_ARRAY; - sc->bp_src_rman.rm_descr = "Interrupt source"; - if (rman_init(&(sc->bp_src_rman)) != 0 || - rman_manage_region(&(sc->bp_src_rman), 0, sc->bp_nsrcs - 1) != 0) { - device_printf(dev, "Failed to set up sources rman"); - error = ENXIO; - goto err; - } - - sc->bp_cfg_bst = rman_get_bustag(sc->bp_cfg_res); - sc->bp_cfg_bsh = rman_get_bushandle(sc->bp_cfg_res); - sc->bp_read_bst = rman_get_bustag(sc->bp_read_res); - sc->bp_read_bsh = rman_get_bushandle(sc->bp_read_res); - sc->bp_set_bst = rman_get_bustag(sc->bp_set_res); - sc->bp_set_bsh = rman_get_bushandle(sc->bp_set_res); - sc->bp_clear_bst = rman_get_bustag(sc->bp_clear_res); - sc->bp_clear_bsh = rman_get_bushandle(sc->bp_clear_res); - - for (src = 0; src < sc->bp_nsrcs; src++) { - config = bp_read_cfg(sc, src); - if (config == 0) - continue; - - if (bootverbose) { - device_printf(dev, "initial config: src %d: %s\n", src, - bp_strconfig(config, configstr, sizeof(configstr))); - if (config & BP_CFG_RESERVED) - device_printf(dev, - "reserved bits not 0: 0x%016jx\n", - (uintmax_t) config); + /* Last IRQ is used for IPIs. */ + for (i = 0; i < (BP_NUM_HARD_IRQS - 1); i++) { + sc->hirq[i].sc = sc; + sc->hirq[i].irq = i; + if (bus_setup_intr(dev, sc->res[4+i], INTR_TYPE_CLK, + beri_pic_intr, NULL, &sc->hirq[i], sc->ih[i])) { + device_printf(dev, "could not setup irq handler\n"); + intr_pic_deregister(dev, xref); + return (ENXIO); - - bp_config_source(dev, src, 0, 0, 0); - fic = malloc(sizeof(*fic), M_BERIPIC, M_WAITOK|M_ZERO); - fic->iph = ph; - fic->dev = dev; - SLIST_INSERT_HEAD(&fdt_ic_list_head, fic, fdt_ics); - -err: - bp_detach_resources(dev); - - return (error); -static struct resource * -beripic_alloc_intr(device_t ic, device_t child, int *rid, u_long irq, - u_int flags) +static void +beri_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) + struct beri_pic_isrc *pic_isrc; - struct resource *rv; + uint64_t reg; - sc = device_get_softc(ic); + sc = device_get_softc(dev); + pic_isrc = (struct beri_pic_isrc *)isrc; - rv = rman_reserve_resource(&(sc->bp_src_rman), irq, irq, 1, flags, - child); - if (rv == NULL) - printf("%s: could not reserve source interrupt for %s\n", - __func__, device_get_nameunit(child)); - rman_set_rid(rv, *rid); - - if ((flags & RF_ACTIVE) && - beripic_activate_intr(ic, rv) != 0) { - printf("%s: could not activate interrupt\n", __func__); - rman_release_resource(rv); - return (NULL); - } - - return (rv); + reg = BP_CFG_ENABLE; + reg |= (pic_isrc->mips_hard_irq << BP_CFG_IRQ_S); + bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg); -static int -beripic_release_intr(device_t ic, struct resource *r) +static void +beri_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) - - return (rman_release_resource(r)); -} + struct beri_pic_isrc *pic_isrc; + struct beripic_softc *sc; + uint64_t reg; -static int -beripic_activate_intr(device_t ic, struct resource *r) -{ - - return (rman_activate_resource(r)); -} + sc = device_get_softc(dev); + pic_isrc = (struct beri_pic_isrc *)isrc; -static int -beripic_deactivate_intr(device_t ic, struct resource *r) -{ - - return (rman_deactivate_resource(r)); + reg = bus_read_8(sc->res[BP_CFG], pic_isrc->irq * 8); + reg &= ~BP_CFG_ENABLE; + bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg); -beripic_config_intr(device_t dev, int irq, enum intr_trigger trig, - enum intr_polarity pol) +beri_pic_map_intr(device_t dev, struct intr_map_data *data, + struct intr_irqsrc **isrcp) - - if (trig != INTR_TRIGGER_CONFORM || pol != INTR_POLARITY_CONFORM) - return (EINVAL); - - return (0); -} - -static int -beripic_setup_intr(device_t ic, device_t child, struct resource *irq, - int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg, - void **cookiep) -{ - struct beripic_intr_arg *bpia; - struct beripic_cookie *bpc; - int error; - u_long hirq, src, tid; + struct intr_map_data_fdt *daf; + uint32_t irq; - sc = device_get_softc(ic); + sc = device_get_softc(dev); + daf = (struct intr_map_data_fdt *)data; - src = rman_get_start(irq); + if (data == NULL || data->type != INTR_MAP_DATA_FDT || + daf->ncells != 1 || daf->cells[0] >= sc->nirqs) + return (EINVAL); - KASSERT(src < sc->bp_nsrcs, ("source (%lu) out of range 0-%d", - src, sc->bp_nsrcs - 1)); + irq = daf->cells[0]; - bpia = malloc(sizeof(*bpia), M_BERIPIC, M_WAITOK|M_ZERO); - bpia->filter = filter; - bpia->intr = intr; - bpia->arg = arg; - bpia->irq = irq; -#ifdef __mips__ - bpia->counter = sc->bp_counters[src]; - bp_set_counter_name(ic, child, src); -#endif + *isrcp = &sc->irqs[irq].isrc; - bpc = malloc(sizeof(*bpc), M_BERIPIC, M_WAITOK|M_ZERO); - bpc->bpia = bpia; - - mtx_lock(&(sc->bp_cfgmtx)); - bpc->hirq = sc->bp_irqs[sc->bp_next_irq]; - hirq = rman_get_start(bpc->hirq); - tid = sc->bp_next_tid; - - error = BUS_SETUP_INTR(device_get_parent(ic), ic, bpc->hirq, flags, - beripic_filter, intr == NULL ? NULL : beripic_intr, bpia, - &(bpc->cookie)); - if (error != 0) - goto err; - -#ifdef NOTYET -#ifdef SMP - /* XXX: bind ithread to cpu */ - sc->bp_next_tid++; - if (sc->bp_next_tid >= sc->bp_nthreads) - sc->bp_next_tid = 0; -#endif -#endif - if (sc->bp_next_tid == 0) { - sc->bp_next_irq++; - if (sc->bp_next_irq >= sc->bp_nirqs) - sc->bp_next_irq = 0; - } - mtx_unlock(&(sc->bp_cfgmtx)); - - *cookiep = bpc; - - bp_config_source(ic, rman_get_start(irq), 1, tid, hirq); - -err: - free(bpc, M_BERIPIC); - free(bpia, M_BERIPIC); - - return (error); -static int -beripic_teardown_intr(device_t dev, device_t child, struct resource *irq, - void *cookie) +static void +beri_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) - struct beripic_cookie *bpc; - int error; - bpc = cookie; - - bp_config_source(dev, rman_get_start(irq), 0, 0, 0); - - free(bpc->bpia, M_BERIPIC); - - error = BUS_TEARDOWN_INTR(device_get_parent(dev), dev, bpc->hirq, - bpc->cookie); - - free(bpc, M_BERIPIC); - - return (error); + beri_pic_enable_intr(dev, isrc); -static int -beripic_filter(void *arg) +static void +beri_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) - struct beripic_intr_arg *bpic; - bpic = arg; - -#ifdef __mips__ - mips_intrcnt_inc(bpic->counter); -#endif - - /* XXX: Add a check that our source is high */ - - if (bpic->filter == NULL) - return (FILTER_SCHEDULE_THREAD); - - return (bpic->filter(bpic->arg)); + beri_pic_disable_intr(dev, isrc); -static void -beripic_intr(void *arg) +#ifdef SMP +void +beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq) - struct beripic_intr_arg *bpic; + struct beripic_softc *sc; + uint64_t reg; - bpic = arg; + sc = device_get_softc(dev); - KASSERT(bpic->intr != NULL, - ("%s installed, but no child intr", __func__)); - - bpic->intr(bpic->arg); + reg = (BP_CFG_ENABLE); + reg |= (ipi_irq << BP_CFG_IRQ_S); + reg |= (tid << BP_CFG_TID_S); + bus_write_8(sc->res[BP_CFG], ((BP_FIRST_SOFT + tid) * 8), reg); -#ifdef SMP -static void -beripic_setup_ipi(device_t ic, u_int tid, u_int ipi_irq) +void +beripic_send_ipi(device_t dev, u_int tid) - - bp_config_source(ic, BP_FIRST_SOFT + tid, 1, tid, ipi_irq); -} - -static void -beripic_send_ipi(device_t ic, u_int tid) -{ - sc = device_get_softc(ic); + sc = device_get_softc(dev); - KASSERT(tid < sc->bp_nsoft, ("tid (%d) too large\n", tid)); + bit = (BP_FIRST_SOFT + tid); + KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid)); - bit = 1ULL << (tid % 64); - bus_space_write_8(sc->bp_set_bst, sc->bp_set_bsh, - (BP_FIRST_SOFT / 8) + (tid / 64), bit); + bus_write_8(sc->res[BP_IP_SET], 0x0, (1 << bit)); -static void -beripic_clear_ipi(device_t ic, u_int tid) +void +beripic_clear_ipi(device_t dev, u_int tid) - sc = device_get_softc(ic); + sc = device_get_softc(dev); - KASSERT(tid < sc->bp_nsoft, ("tid (%d) to large\n", tid)); + bit = (BP_FIRST_SOFT + tid); + KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid)); - bit = 1ULL << (tid % 64); - bus_space_write_8(sc->bp_clear_bst, sc->bp_clear_bsh, - (BP_FIRST_SOFT / 8) + (tid / 64), bit); + bus_write_8(sc->res[BP_IP_CLEAR], 0x0, (1 << bit)); -devclass_t beripic_devclass; - - DEVMETHOD(device_probe, beripic_fdt_probe), - DEVMETHOD(device_attach, beripic_fdt_attach), + DEVMETHOD(device_probe, beripic_probe), + DEVMETHOD(device_attach, beripic_attach), - DEVMETHOD(fdt_ic_activate_intr, beripic_activate_intr), - DEVMETHOD(fdt_ic_alloc_intr, beripic_alloc_intr), - DEVMETHOD(fdt_ic_config_intr, beripic_config_intr), - DEVMETHOD(fdt_ic_deactivate_intr, beripic_deactivate_intr), - DEVMETHOD(fdt_ic_release_intr, beripic_release_intr), - DEVMETHOD(fdt_ic_setup_intr, beripic_setup_intr), - DEVMETHOD(fdt_ic_teardown_intr, beripic_teardown_intr), + /* Interrupt controller interface */ + DEVMETHOD(pic_enable_intr, beri_pic_enable_intr), + DEVMETHOD(pic_disable_intr, beri_pic_disable_intr), + DEVMETHOD(pic_map_intr, beri_pic_map_intr), + DEVMETHOD(pic_post_ithread, beri_pic_post_ithread), + DEVMETHOD(pic_pre_ithread, beri_pic_pre_ithread), -#ifdef SMP - DEVMETHOD(fdt_ic_setup_ipi, beripic_setup_ipi), - DEVMETHOD(fdt_ic_clear_ipi, beripic_clear_ipi), - DEVMETHOD(fdt_ic_send_ipi, beripic_send_ipi), -#endif - - { 0, 0 }, + DEVMETHOD_END -static driver_t beripic_fdt_driver = { +devclass_t beripic_devclass; + +static driver_t beripic_driver = { -DRIVER_MODULE(beripic, simplebus, beripic_fdt_driver, beripic_devclass, 0, 0); +EARLY_DRIVER_MODULE(beripic, ofwbus, beripic_driver, beripic_devclass, 0, 0, + BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); Index: sys/mips/include/fls64.h + * $FreeBSD$ Index: sys/mips/rmi/dev/xlr/atx_cpld.h + * $FreeBSD$ Index: sys/mips/rmi/dev/xlr/xgmac_mdio.h + * $FreeBSD$ Index: sys/mips/rmi/msgring.c + * $FreeBSD$ Index: sys/mips/rmi/msgring.cfg + * $FreeBSD$ Index: sys/netinet/igmp_var.h -/*-a Index: sys/sys/copyright.h - * Copyright (C) 1992-2018 The FreeBSD Project. All rights reserved. + * Copyright (C) 1992-2017 The FreeBSD Project. All rights reserved. - "Copyright (c) 1992-2018 The FreeBSD Project.\n" + "Copyright (c) 1992-2017 The FreeBSD Project.\n" -/* a port of FreeBSD to the NEC PC98, Japan */ -#if defined(PC98) -#define COPYRIGHT_PC98 \ - "Copyright (c) 1994-2003 FreeBSD(98) porting team.\nCopyright (c) 1992 A.Kojima F.Ukai M.Ishii (KMC).\n" -#else -#define COPYRIGHT_PC98 -#endif - -char copyright[] = COPYRIGHT_Vendor COPYRIGHT_FreeBSD COPYRIGHT_PC98 \ - COPYRIGHT_UCB; +char copyright[] = COPYRIGHT_Vendor COPYRIGHT_FreeBSD COPYRIGHT_UCB; Index: sys/sys/random.h - * Copyright (c) 2000-2015 Mark R. V. Murray + * Copyright (c) 2000-2015, 2017 Mark R. V. Murray - * Note: if you add or remove members of random_entropy_source, remember to also update the - * KASSERT regarding what valid members are in random_harvest_internal(), and remember the - * strings in the static array random_source_descr[] in random_harvestq.c. + * Note: if you add or remove members of random_entropy_source, remember to + * also update the strings in the static array random_source_descr[] in + * random_harvestq.c. - RANDOM_PURE_OCTEON, + RANDOM_PURE_START, + RANDOM_PURE_OCTEON = RANDOM_PURE_START, + RANDOM_PURE_BROADCOM, +#define RANDOM_HARVEST_PURE_MASK (((1 << ENTROPYSOURCE) - 1) & (-1UL << RANDOM_PURE_START)) +#define RANDOM_LEGACY_BOOT_ENTROPY_MODULE "/boot/entropy" +#define RANDOM_CACHED_BOOT_ENTROPY_MODULE "boot_entropy_cache" +#define RANDOM_CACHED_SKIP_START 256 + +void random_harvest_register_source(enum random_entropy_source); +void random_harvest_deregister_source(enum random_entropy_source); +#define random_harvest_register_source(a) do {} while (0) +#define random_harvest_deregister_source(a) do {} while (0) Index: usr.bin/mt/mt.c - * Copyright (c) 1980, 1993 BELOW HERE I INCLUDED THE ORIGINAL MERGINFO: Index: . =================================================================== --- . (revision 330896) +++ . (revision 330897) Property changes on: . ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head:r325966,326022-326025,326027,326192-326193,326219,326255-326261 -- Rod Grimes rgrimes@freebsd.org