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Date:      Sun, 30 Dec 2012 11:21:33 -0700
From:      Ian Lepore <freebsd@damnhippie.dyndns.org>
To:        Scott Long <scott4long@yahoo.com>
Cc:        powerpc@freebsd.org, marcel@freebsd.org, mips@freebsd.org, "mav@freebsd.org Motin" <mav@freebsd.org>, "attilio@FreeBSD.org Rao" <attilio@freebsd.org>, Jeff Roberson <jroberson@jroberson.net>, sparc64@freebsd.org, arm@freebsd.org, kib@freebsd.org
Subject:   Re: Call for testing and review, busdma changes
Message-ID:  <1356891693.54953.31.camel@revolution.hippie.lan>
In-Reply-To: <2D98F70D-4031-4860-BABB-1F4663896234@yahoo.com>
References:  <alpine.BSF.2.00.1212080841370.4081@desktop> <1355077061.87661.320.camel@revolution.hippie.lan> <alpine.BSF.2.00.1212090840080.4081@desktop> <1355085250.87661.345.camel@revolution.hippie.lan> <alpine.BSF.2.00.1212231418120.2005@desktop> <1356381775.1129.181.camel@revolution.hippie.lan> <alpine.BSF.2.00.1212241104040.2005@desktop> <1356390225.1129.217.camel@revolution.hippie.lan> <2D98F70D-4031-4860-BABB-1F4663896234@yahoo.com>

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On Mon, 2012-12-24 at 22:13 -0500, Scott Long wrote:
> >>> 
> >>> Still unresolved is what to do about the remaining cases -- attempts to
> >>> do dma in arbitrary buffers not obtained from bus_dmamem_alloc() which
> >>> are not aligned and padded appropriately.  There was some discussion a
> >>> while back, but no clear resolution.  I decided not to get bogged down
> >>> by that fact and to fix the mbuf and allocated-buffer situations that we
> >>> know how to deal with for now.
> >> 
> 
> Why would these allocations not be handled as normal dynamic buffers
> would with bus_dmamap_load()?
> 
> Scott

That's my point -- for "normal dynamic buffers" (that is, they weren't
obtained from bus_dmamem_alloc() and they aren't mbufs) which can have
arbitrary alignment and padding in relation to cache line boundaries --
we don't handle them correctly now unless they're accidentally already
aligned and sized to the right boundaries.  What's unresolved is how to
handle them correctly if they're not aligned/padded, that is, what to do
about them that avoids needing a partial cacheline flush at sync time.

-- Ian





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