From owner-freebsd-arch@FreeBSD.ORG Mon Jun 16 16:43:47 2003 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 634F437B404; Mon, 16 Jun 2003 16:43:47 -0700 (PDT) Received: from www.ambrisko.com (adsl-64-174-51-42.dsl.snfc21.pacbell.net [64.174.51.42]) by mx1.FreeBSD.org (Postfix) with ESMTP id 5D43743FBD; Mon, 16 Jun 2003 16:43:46 -0700 (PDT) (envelope-from ambrisko@www.ambrisko.com) Received: from www.ambrisko.com (localhost [127.0.0.1]) by www.ambrisko.com (8.12.8p1/8.12.8) with ESMTP id h5GNhdO7091212; Mon, 16 Jun 2003 16:43:39 -0700 (PDT) (envelope-from ambrisko@www.ambrisko.com) Received: (from ambrisko@localhost) by www.ambrisko.com (8.12.8p1/8.12.8/Submit) id h5GNhdnl091211; Mon, 16 Jun 2003 16:43:39 -0700 (PDT) (envelope-from ambrisko) From: Doug Ambrisko Message-Id: <200306162343.h5GNhdnl091211@www.ambrisko.com> In-Reply-To: <3EEE2B31.4020406@freebsd.org> To: Scott Long Date: Mon, 16 Jun 2003 16:43:39 -0700 (PDT) X-Mailer: ELM [version 2.4ME+ PL94b (25)] MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=US-ASCII cc: arch@freebsd.org cc: John-Mark Gurney Subject: Re: make /dev/pci really readable X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 16 Jun 2003 23:43:47 -0000 Scott Long writes: | You should not always assume that reading PCI registers has no | side-effects. It is certainly legal and possible for a PCI device to | detect the read request and alter the contents of the register (or some | other register) as a side effect, or change an internal state machine. | 'Fixing' the various bits to allow unpriviledged access to 'pciconf -r' | is dangerous since you would have to teach the system about every pci | device in existance and how to trap on registers that have side-effects. I seem to recall reading some PCI chip spec. for a chip I was working on that did a reset on read of that register. I can't recall which or where so don't take this as fact but a distant memory. Doug A.