From owner-cvs-all@FreeBSD.ORG Wed Nov 2 21:29:29 2005 Return-Path: X-Original-To: cvs-all@freebsd.org Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id C5E1216A41F; Wed, 2 Nov 2005 21:29:29 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from speedfactory.net (mail5.speedfactory.net [66.23.216.218]) by mx1.FreeBSD.org (Postfix) with ESMTP id DC35D43D49; Wed, 2 Nov 2005 21:29:28 +0000 (GMT) (envelope-from jhb@freebsd.org) Received: from server.baldwin.cx (unverified [66.23.211.162]) by speedfactory.net (SurgeMail 3.5b3) with ESMTP id 1260161 for multiple; Wed, 02 Nov 2005 16:27:18 -0500 Received: from localhost (john@localhost [127.0.0.1]) by server.baldwin.cx (8.13.1/8.13.1) with ESMTP id jA2LTEFv059615; Wed, 2 Nov 2005 16:29:16 -0500 (EST) (envelope-from jhb@freebsd.org) From: John Baldwin To: Scott Long Date: Wed, 2 Nov 2005 16:22:19 -0500 User-Agent: KMail/1.8.2 References: <200511022011.jA2KBlHQ005559@repoman.freebsd.org> <436928C2.8090304@samsco.org> In-Reply-To: <436928C2.8090304@samsco.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200511021622.21242.jhb@freebsd.org> X-Spam-Status: No, score=-2.2 required=4.2 tests=ALL_TRUSTED, SUBJ_HAS_SPACES autolearn=failed version=3.0.2 X-Spam-Checker-Version: SpamAssassin 3.0.2 (2004-11-16) on server.baldwin.cx X-Server: High Performance Mail Server - http://surgemail.com r=100 Cc: cvs-src@freebsd.org, src-committers@freebsd.org, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/amd64/amd64 io_apic.c local_apic.c src/sys/amd64/include apicvar.h intr_machdep.h src/sys/i386/i386 io_apic.c local_apic.c src/sys/i386/include apicvar.h intr_machdep.h X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Nov 2005 21:29:30 -0000 On Wednesday 02 November 2005 03:59 pm, Scott Long wrote: > John Baldwin wrote: > > jhb 2005-11-02 20:11:47 UTC > > > > FreeBSD src repository > > > > Modified files: > > sys/amd64/amd64 io_apic.c local_apic.c > > sys/amd64/include apicvar.h intr_machdep.h > > sys/i386/i386 io_apic.c local_apic.c > > sys/i386/include apicvar.h intr_machdep.h > > Log: > > Change the x86 code to allocate IDT vectors on-demand when an interrupt > > source is first enabled similar to how intr_event's now allocate > > ithreads on-demand. Previously, we would map IDT vectors 1:1 to IRQs. > > Since we only have 191 available IDT vectors for I/O interrupts, this > > limited us to only supporting IRQs 0-190 corresponding to the first 190 > > I/O APIC intpins. On many machines, however, each PCI-X bus has its own > > APIC even though it only has 1 or 2 devices, thus, we were reserving > > between 24 and 32 IRQs just for 1 or 2 devices and thus 24 or 32 IDT > > vectors. With this change, a machine with 100 IRQs but only 5 in use > > will only use up 5 IDT vectors. Also, this change provides an API > > (apic_alloc_vector() and apic_free_vector()) that will allow a future MSI > > interrupt source driver to request IDT vectors for use by MSI interrupts > > on x86 machines. > > > > Tested on: amd64, i386 > > > > Revision Changes Path > > 1.18 +84 -68 src/sys/amd64/amd64/io_apic.c > > 1.19 +100 -22 src/sys/amd64/amd64/local_apic.c > > 1.14 +3 -2 src/sys/amd64/include/apicvar.h > > 1.7 +29 -3 src/sys/amd64/include/intr_machdep.h > > 1.23 +84 -68 src/sys/i386/i386/io_apic.c > > 1.20 +101 -23 src/sys/i386/i386/local_apic.c > > 1.14 +3 -2 src/sys/i386/include/apicvar.h > > 1.9 +29 -3 src/sys/i386/include/intr_machdep.h > > Excellent, thanks a lot. The other savings here is the dozens of unused > ithread stack pages and pcbs. That was the earlier intr_event stuff. :-P -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve" = http://www.FreeBSD.org