From owner-freebsd-arch@FreeBSD.ORG Fri Jun 27 13:58:43 2003 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 3BB2F37B401 for ; Fri, 27 Jun 2003 13:58:43 -0700 (PDT) Received: from duke.cs.duke.edu (duke.cs.duke.edu [152.3.140.1]) by mx1.FreeBSD.org (Postfix) with ESMTP id 687AD43FE0 for ; Fri, 27 Jun 2003 13:58:42 -0700 (PDT) (envelope-from gallatin@cs.duke.edu) Received: from grasshopper.cs.duke.edu (grasshopper.cs.duke.edu [152.3.145.30]) by duke.cs.duke.edu (8.12.9/8.12.9) with ESMTP id h5RKwfwV002014 (version=TLSv1/SSLv3 cipher=EDH-RSA-DES-CBC3-SHA bits=168 verify=NO); Fri, 27 Jun 2003 16:58:41 -0400 (EDT) Received: (from gallatin@localhost) by grasshopper.cs.duke.edu (8.11.6/8.9.1) id h5RKwZQ00709; Fri, 27 Jun 2003 16:58:35 -0400 (EDT) (envelope-from gallatin@cs.duke.edu) From: Andrew Gallatin MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <16124.45051.919899.414795@grasshopper.cs.duke.edu> Date: Fri, 27 Jun 2003 16:58:35 -0400 (EDT) To: Scott Long In-Reply-To: <3EFCAC7A.6060305@btc.adaptec.com> References: <3EF3C12F.9060303@btc.adaptec.com> <16124.39930.142492.356163@grasshopper.cs.duke.edu> <3EFC9F2D.6020908@btc.adaptec.com> <16124.43999.333761.397624@grasshopper.cs.duke.edu> <3EFCAC7A.6060305@btc.adaptec.com> X-Mailer: VM 6.75 under 21.1 (patch 12) "Channel Islands" XEmacs Lucid cc: freebsd-arch@freebsd.org Subject: Re: API change for bus_dma X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Jun 2003 20:58:43 -0000 Scott Long writes: > > I'm not familiar with Solaris DDI. bus_dmamem_alloc() is guaranteed to > give you contiguous memory that doesn't require bouncing (or ENOMEM if > that's not possible). I can't imagine what DDI_DMA_STREAMING is. Most sparc's have 2 different sorts of DMA modes. One is cache coherent (aka DDI_DMA_CONSISTENT) -- this is what we all know and love from PC, alphas, macs, etc. The other mode (DDI_DMA_STREAMING) allows non cache coherent DMA. This requires you to call ddi_dma_sync() between your last touch of the data and you starting a DMA read from a device. And vice-versa for a DMA write. The reason people use DDI_DMA_STREAMING is because coherent DMA bandwith tends to be abysmal on most sparcs. Using DDI_DMA_STREAMING upgrades the bandwith from abysmal to just bad. Here are some examples: For u80, UltraSPARC II, using chip "Psycho", 98 MBytes/s consistent vs. 150 MBytes/s streaming. For sunfire, UltraSPARC III, using chip "Schizo", 70 MBytes/s consistent vs. 173 MBytes/s streaming. (compare to 450MB/sec for most intel 64-bit/66MHz PCI slots).. Drew