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Date:      Mon, 25 Feb 2019 17:40:00 +0000 (UTC)
From:      Emmanuel Vadot <manu@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r344527 - head/sys/arm64/rockchip/clk
Message-ID:  <201902251740.x1PHe0Id092644@repo.freebsd.org>

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Author: manu
Date: Mon Feb 25 17:40:00 2019
New Revision: 344527
URL: https://svnweb.freebsd.org/changeset/base/344527

Log:
  arm64: rockchip: clk: Set the write mask when setting the clock mux
  
  RockChip clocks have a write mask in the upper 16bits of the mux register
  which wasn't set in the set_mux function.
  Also the wrong parent was tested instead of the real current one, when
  switch parent, test with the current one before.
  
  Pointy Hat:    manu
  MFC after:	1 week

Modified:
  head/sys/arm64/rockchip/clk/rk_clk_composite.c

Modified: head/sys/arm64/rockchip/clk/rk_clk_composite.c
==============================================================================
--- head/sys/arm64/rockchip/clk/rk_clk_composite.c	Mon Feb 25 17:30:01 2019	(r344526)
+++ head/sys/arm64/rockchip/clk/rk_clk_composite.c	Mon Feb 25 17:40:00 2019	(r344527)
@@ -128,7 +128,7 @@ rk_clk_composite_set_mux(struct clknode *clk, int inde
 	READ4(clk, sc->muxdiv_offset, &val);
 	val &= ~sc->mux_mask;
 	val |= index << sc->mux_shift;
-	WRITE4(clk, sc->muxdiv_offset, val);
+	WRITE4(clk, sc->muxdiv_offset, val | RK_CLK_COMPOSITE_MASK);
 	DEVICE_UNLOCK(clk);
 
 	return (0);
@@ -222,6 +222,7 @@ rk_clk_composite_set_freq(struct clknode *clk, uint64_
 		return (0);
 	}
 
+	p_idx = clknode_get_parent_idx(clk);
 	if (p_idx != best_parent)
 		clknode_set_parent_by_idx(clk, best_parent);
 



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