From owner-freebsd-amd64@FreeBSD.ORG Sun Jan 23 10:30:27 2005 Return-Path: Delivered-To: freebsd-amd64@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 9BA2116A4CE; Sun, 23 Jan 2005 10:30:27 +0000 (GMT) Received: from ford.blinkenlights.nl (ford.blinkenlights.nl [213.204.211.2]) by mx1.FreeBSD.org (Postfix) with ESMTP id 46B0543D1D; Sun, 23 Jan 2005 10:30:27 +0000 (GMT) (envelope-from sten@blinkenlights.nl) Received: from tea.blinkenlights.nl (tea.blinkenlights.nl [192.168.1.21]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ford.blinkenlights.nl (Postfix) with ESMTP id 3F16B3F294; Sun, 23 Jan 2005 11:30:26 +0100 (CET) Received: by tea.blinkenlights.nl (Postfix, from userid 101) id D261B1DB; Sun, 23 Jan 2005 11:30:25 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by tea.blinkenlights.nl (Postfix) with ESMTP id C604A13D; Sun, 23 Jan 2005 11:30:25 +0100 (CET) Date: Sun, 23 Jan 2005 11:30:25 +0100 (CET) From: Sten Spans To: Scott Long In-Reply-To: <41F31836.2010403@freebsd.org> Message-ID: References: <20050122141741.9690.qmail@web26804.mail.ukl.yahoo.com> <41F31836.2010403@freebsd.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed cc: freebsd-amd64@freebsd.org Subject: Re: Would this system work correctly with FreeBSD 5.3 ? X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 23 Jan 2005 10:30:27 -0000 On Sat, 22 Jan 2005, Scott Long wrote: > Sten Spans wrote: > >> On Sat, 22 Jan 2005, Claus Guttesen wrote: > >> >> - Quad motherboards: >> It's a shame that tyan connects all >> the pci interfaces on their quad motherboard >> to one cpu. The hp/compaq quad proliant has >> seperate buses to two cpu's for extra bandwith. > > This is really academic right now since FreeBSD does not take > topology into account when making scheduling decisions or > routing interrupts. Without this affinity, it's only luck > if you happen to wind up on a CPU that is closer to the data. > Also, I don't believe that PCI buses are connected to CPUs > at all. They are connected via HT-PCI bridges that act as > normal HT peers. Only memory is connected directly to the CPU. > But I might be wrong. True, motherboards with this setup have extra ht-pci bridges. The amd reference motherboards have this design. But most motherboards don't use this setup to cut costs ( less bridges and traces needed ) and because it requires more cpu sockets to be populated ( although this isn't such a big problem on a quad motherboard ). -- Sten Spans "There is a crack in everything, that's how the light gets in." Leonard Cohen - Anthem