Date: Mon, 27 Aug 2012 09:34:30 -0600 From: Warner Losh <imp@bsdimp.com> To: Tim Kientzle <tim@kientzle.com> Cc: Hans Petter Selasky <hans.petter.selasky@bitfrost.no>, freebsd-arm@freebsd.org, freebsd-mips@freebsd.org, freebsd-arch@freebsd.org Subject: Re: Partial cacheline flush problems on ARM and MIPS Message-ID: <45C204C3-D4CE-4B00-886A-A88A0FE7CAD7@bsdimp.com> In-Reply-To: <DA9750F9-7B8A-49AF-8ECA-AC7D565CF3F5@kientzle.com> References: <6D83AF9D-577B-4C83-84B7-C4E3B32695FC@bsdimp.com> <zarafa.503b0e81.5c36.1a2f71091ebf9bd2@eric2.bitfrost> <A749E691-BF25-4B72-B929-56ABEB10F3E9@bsdimp.com> <DA9750F9-7B8A-49AF-8ECA-AC7D565CF3F5@kientzle.com>
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On Aug 27, 2012, at 9:12 AM, Tim Kientzle wrote: >=20 > On Aug 27, 2012, at 6:38 AM, Warner Losh wrote: >=20 >>=20 >> On Aug 27, 2012, at 12:06 AM, Hans Petter Selasky wrote: >>=20 >>> Hi, >>> Correct. >>>=20 >>>> We also need some rules about working with buffers obtained from >>>> bus_dmamem_alloc() and external buffers passed to = bus_dmamap_load(). I >>>> think the rule should be that a buffer obtained from = bus_dmamem_alloc(), >>>> or more formally any region of memory mapped by a = bus_dmamap_load(), is >>>> a single logical object which can only be accessed by one entity at = a >>>> time. That means that there cannot be two concurrent DMA = operations >>>> happening in different regions of the same buffer, nor can DMA and = CPU >>>> access be happening concurrently even if in different parts of the >>>> buffer. =20 >>>=20 >>> Is this something which we can fix using a simple = __align(USB_DMA_ALIGN) on elements in C-structures which are allowed to = be DMA loaded. >>=20 >> No. I don't think so. the reason is that you can't define = USB_DMA_ALGIN to be a constant on MIPS, at least, or I think ARM because = that's determined at run time. >=20 > But don't mbuf structures do pretty much what Hans is suggesting? They kinda do, and kinda don't. > Why is mbuf okay? mbuf is OK because it is never changed while the DMA is pending to the = buffers. That is, m_hdr and m_ext are invariant while the device owns = the memory. In addition, mbuf allocations are so large that no two mbufs = share the same cache line (although it looks like 256 might be too small = to avoid that on some MIPS processors). usb buffers do not obey these = same rules, otherwise none of the stuff we're talking about would = matter. Warner=
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