Date: Sat, 4 Apr 2015 00:10:26 +0200 From: Milan Obuch <freebsd-arm@dino.sk> To: freebsd-arm@freebsd.org Subject: PiTFT driver for Ilitek controller Message-ID: <20150404001026.4c0121ba@zeta.dino.sk>
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Hi, I am trying to write a driver for PiTFT, where Ilitek chip is used for TFT control. There is SPI bus used for connection to Raspberry, but with one GPIO pin added used as command flag. Programming this chip means series of command of varying length with first byte being marked as command byte. I know how to do a transfer on SPI bus, I can communicate with second controller chip on PiTFT used for touchscreen part of device, which uses only SPI, nothing added. For Ilitek chip, however, there is one pin more. This design seems to be used by other TFT/LCD controller chips. Now there is a problem - SPI controller in BCM2835, source file name is bcm2835_spi.c, works in interrupt mode. CD pin needs to be reset after first byte of transfer sequence is clocked onto bus, but how could this condition be checked? I think about some code added into bcm_spi_intr() function, but when is this routine called? I need to detect interrupt after first byte is transferred on SPI bus, is it possible to do this way? If interrupt is generated after every byte being transferred, then yes, it is not that complicated, but maybe it is generated only after more bytes are already transferred, using FIFO... I am trying to find some answer in BCM2835 ARM peripherals datasheet, but I am not sure I understand everything right, and there is not much written about SPI anyway, just some description of SPI, registers definition and simple programming outline, not too detailed. Regards, Milan
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