From owner-svn-src-head@FreeBSD.ORG Sat Feb 21 23:15:34 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 64DFB1065672; Sat, 21 Feb 2009 23:15:34 +0000 (UTC) (envelope-from jeff@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 52D4B8FC18; Sat, 21 Feb 2009 23:15:34 +0000 (UTC) (envelope-from jeff@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n1LNFY0M077944; Sat, 21 Feb 2009 23:15:34 GMT (envelope-from jeff@svn.freebsd.org) Received: (from jeff@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n1LNFYMc077942; Sat, 21 Feb 2009 23:15:34 GMT (envelope-from jeff@svn.freebsd.org) Message-Id: <200902212315.n1LNFYMc077942@svn.freebsd.org> From: Jeff Roberson Date: Sat, 21 Feb 2009 23:15:34 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r188904 - in head/sys: amd64/amd64 i386/i386 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 21 Feb 2009 23:15:35 -0000 Author: jeff Date: Sat Feb 21 23:15:34 2009 New Revision: 188904 URL: http://svn.freebsd.org/changeset/base/188904 Log: - Resolve an issue where we may clear an idt while an interrupt on a different cpu is still assigned to that vector by never clearing idt entries. This was only provided as a debugging feature and the bugs are caught by other means. - Drop the sched lock when rebinding to reassign an interrupt vector to a new cpu so that pending interrupts have a chance to be delivered before removing the old vector. Discussed with: tegge, jhb Modified: head/sys/amd64/amd64/local_apic.c head/sys/i386/i386/local_apic.c Modified: head/sys/amd64/amd64/local_apic.c ============================================================================== --- head/sys/amd64/amd64/local_apic.c Sat Feb 21 22:57:26 2009 (r188903) +++ head/sys/amd64/amd64/local_apic.c Sat Feb 21 23:15:34 2009 (r188904) @@ -900,7 +900,13 @@ apic_disable_vector(u_int apic_id, u_int KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); KASSERT(ioint_handlers[vector / 32] != NULL, ("No ISR handler for vector %u", vector)); +#ifdef notyet + /* + * We can not currently clear the idt entry because other cpus + * may have a valid vector at this offset. + */ setidt(vector, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); +#endif } /* Release an APIC vector when it's no longer in use. */ @@ -924,9 +930,11 @@ apic_free_vector(u_int apic_id, u_int ve if (sched_is_bound(td)) panic("apic_free_vector: Thread already bound.\n"); sched_bind(td, apic_cpuid(apic_id)); + thread_unlock(td); mtx_lock_spin(&icu_lock); lapics[apic_id].la_ioint_irqs[vector - APIC_IO_INTS] = 0; mtx_unlock_spin(&icu_lock); + thread_lock(td); sched_unbind(td); thread_unlock(td); Modified: head/sys/i386/i386/local_apic.c ============================================================================== --- head/sys/i386/i386/local_apic.c Sat Feb 21 22:57:26 2009 (r188903) +++ head/sys/i386/i386/local_apic.c Sat Feb 21 23:15:34 2009 (r188904) @@ -903,8 +903,14 @@ apic_disable_vector(u_int apic_id, u_int KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); KASSERT(ioint_handlers[vector / 32] != NULL, ("No ISR handler for vector %u", vector)); +#ifdef notyet + /* + * We can not currently clear the idt entry because other cpus + * may have a valid vector at this offset. + */ setidt(vector, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); +#endif } /* Release an APIC vector when it's no longer in use. */ @@ -928,9 +934,11 @@ apic_free_vector(u_int apic_id, u_int ve if (sched_is_bound(td)) panic("apic_free_vector: Thread already bound.\n"); sched_bind(td, apic_cpuid(apic_id)); + thread_unlock(td); mtx_lock_spin(&icu_lock); lapics[apic_id].la_ioint_irqs[vector - APIC_IO_INTS] = 0; mtx_unlock_spin(&icu_lock); + thread_lock(td); sched_unbind(td); thread_unlock(td);