From owner-p4-projects@FreeBSD.ORG Thu Feb 21 23:18:08 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id B640F16A406; Thu, 21 Feb 2008 23:18:08 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7523516A404 for ; Thu, 21 Feb 2008 23:18:08 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 6130513C467 for ; Thu, 21 Feb 2008 23:18:08 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m1LNI8LL002951 for ; Thu, 21 Feb 2008 23:18:08 GMT (envelope-from rrs@cisco.com) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m1LNI85Y002948 for perforce@freebsd.org; Thu, 21 Feb 2008 23:18:08 GMT (envelope-from rrs@cisco.com) Date: Thu, 21 Feb 2008 23:18:08 GMT Message-Id: <200802212318.m1LNI85Y002948@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to rrs@cisco.com using -f From: "Randall R. Stewart" To: Perforce Change Reviews Cc: Subject: PERFORCE change 135921 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Feb 2008 23:18:09 -0000 http://perforce.freebsd.org/chv.cgi?CH=135921 Change 135921 by rrs@rrs-mips2-jnpr on 2008/02/21 23:18:05 single on into one.. not clock.c and tick.c Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips/tick.c#5 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips/tick.c#5 (text+ko) ==== @@ -49,19 +49,22 @@ #include #include -uint64_t counter_freq; -uint64_t counts_per_hz; -uint32_t counts_per_usec; -int counter_is_broken; -u_int counter_present; +uint64_t counter_freq; +uint64_t counts_per_hz; +uint32_t counts_per_usec; +int counter_is_broken=0; +u_int counter_present; +u_int32_t counter_upper = 0; +u_int32_t counter_lower_last = 0; +int clock_started = 0; /* * Device methods */ -static int clock_probe(device_t); -static void clock_identify(driver_t *, device_t); -static int clock_attach(device_t); -static unsigned counter_get_timecount(struct timecounter *tc); +static int clock_probe(device_t); +static void clock_identify(driver_t *, device_t); +static int clock_attach(device_t); +static unsigned counter_get_timecount(struct timecounter *tc); static struct timecounter counter_timecounter = { counter_get_timecount, /* get_timecount */ @@ -72,56 +75,80 @@ 800, /* quality (adjusted in code) */ }; -void tick_early_init (uint32_t clock_hz) +void tick_early_init(uint32_t); +void tick_init_params(uint64_t, int ); + +void +tick_early_init(uint32_t clock_hz) +{ + /* Cavium early init code */ + counter_freq = clock_hz; + counts_per_usec = (clock_hz / (1000 * 1000)); +} + +void +cpu_initclocks(void) { - /* Cavium early init code */ - counter_freq = clock_hz; - counts_per_usec = (clock_hz / (1000 * 1000)); + + if (!clock_started) { + tc_init(&counter_timecounter); + clock_started++; + } } + static uint64_t tick_ticker(void) { + uint64_t ret; + uint32_t ticktock; + + ticktock = mips_rd_count(); + critical_enter(); + if (ticktock < counter_lower_last) { + counter_upper++; + } + counter_lower_last = ticktock; + critical_exit(); - return ((uint64_t)mips_rd_count()); + ret = ((uint64_t) counter_upper << 32) | counter_lower_last; + return (ret); } + + void tick_init_params(uint64_t platform_counter_freq, int double_count) { - /* - * XXX: Do not use printf here: uart code 8250 may use DELAY so - * this function should be called before cninit. + /* + * XXX: Do not use printf here: uart code 8250 may use DELAY so this + * function should be called before cninit. */ counter_freq = platform_counter_freq; counts_per_hz = counter_freq / hz; counts_per_usec = counter_freq / (1 * 1000 * 1000); + counter_timecounter.tc_frequency = counter_freq; /* - * XXX: Some MIPS32 cores update the Count register - * only every two pipeline cycles. + * XXX: Some MIPS32 cores update the Count register only every two + * pipeline cycles. */ if (double_count != 0) { counts_per_hz /= 2; counts_per_usec /= 2; } - + printf("hz=%d counts_per_hz:%jd counts_per_usec:%d freq:%jd\n", + hz, + counts_per_hz, + counts_per_usec, + counter_freq + ); set_cputicker(tick_ticker, counter_freq, 1); } -void tick_init(void) -{ - - printf("MIPS32 clock: %ju Hz\n", (intmax_t)counter_freq); - if (counter_freq != 0 && !counter_is_broken) { - counter_timecounter.tc_frequency = counter_freq; - tc_init(&counter_timecounter); - } -} - static int sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS) { @@ -140,7 +167,7 @@ } SYSCTL_PROC(_machdep, OID_AUTO, counter_freq, CTLTYPE_QUAD | CTLFLAG_RW, - 0, sizeof(u_int), sysctl_machdep_counter_freq, "IU", ""); + 0, sizeof(u_int), sysctl_machdep_counter_freq, "IU", ""); static unsigned counter_get_timecount(struct timecounter *tc) @@ -149,8 +176,19 @@ return (mips_rd_count()); } -#ifdef __DUPLCATE_OUT_WARNER -/* fix me */ + +void +cpu_startprofclock(void) +{ + /* nothing to do */ +} + +void +cpu_stopprofclock(void) +{ + /* nothing to do */ +} + /* * Wait for about n microseconds (at least!). */ @@ -158,9 +196,10 @@ DELAY(int n) { uint32_t cur, last, delta, usecs; + /* - * This works by polling the timer and counting the - * number of microseconds that go by. + * This works by polling the timer and counting the number of + * microseconds that go by. */ last = mips_rd_count(); delta = usecs = 0; @@ -182,7 +221,7 @@ } } } -#endif + int sysbeep(int pitch, int period) @@ -193,8 +232,10 @@ #ifdef TARGET_OCTEON int wheel_run = 0; + #define OCTEON_TICK_COUNT 100 -void octeon_led_run_wheel(void); +void octeon_led_run_wheel(void); + #endif /* * Device section of file below @@ -202,14 +243,21 @@ static int clock_intr(void *arg) { - struct trapframe *tf; - register_t usermode, pc; + struct trapframe *tf; + register_t usermode, pc; + uint32_t ltick; /* * Set next clock edge. */ - mips_wr_compare(mips_rd_count() + counter_freq / hz); - + ltick = mips_rd_count(); + mips_wr_compare(ltick + counter_freq / hz); + critical_enter(); + if (ltick < counter_lower_last) { + counter_upper++; + counter_lower_last = ltick; + } + critical_exit(); /* * Magic. Setting up with an arg of NULL means we get passed tf. * XXX this comment and the code don't match. @@ -221,15 +269,14 @@ #ifdef TARGET_OCTEON /* Run the FreeBSD display once every N ticks */ wheel_run++; - if(wheel_run >= OCTEON_TICK_COUNT) { - wheel_run = 0; - octeon_led_run_wheel(); + if (wheel_run >= OCTEON_TICK_COUNT) { + wheel_run = 0; + octeon_led_run_wheel(); } -#endif +#endif if (clocks_running) { hardclock(usermode, pc); } - return (FILTER_HANDLED); } @@ -245,7 +292,7 @@ } static void -clock_identify(driver_t *drv, device_t parent) +clock_identify(driver_t * drv, device_t parent) { BUS_ADD_CHILD(parent, 0, "clock", 0); @@ -264,7 +311,6 @@ device_printf(dev, "failed to allocate irq\n"); return (ENXIO); } - error = bus_setup_intr(dev, irq, INTR_TYPE_CLK, clock_intr, NULL, NULL, NULL); @@ -272,20 +318,19 @@ device_printf(dev, "bus_setup_intr returned %d\n", error); return (error); } - - mips_wr_compare(mips_rd_count() + counter_freq/hz); + mips_wr_compare(mips_rd_count() + counter_freq / hz); return (0); } static device_method_t clock_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, clock_probe), - DEVMETHOD(device_identify, clock_identify), - DEVMETHOD(device_attach, clock_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), + DEVMETHOD(device_probe, clock_probe), + DEVMETHOD(device_identify, clock_identify), + DEVMETHOD(device_attach, clock_attach), + DEVMETHOD(device_detach, bus_generic_detach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), - { 0, 0 } + {0, 0} }; static driver_t clock_driver = {