From owner-svn-src-head@freebsd.org Tue Mar 7 22:11:59 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 3675ED02387; Tue, 7 Mar 2017 22:11:59 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id DFDEA1A05; Tue, 7 Mar 2017 22:11:58 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v27MBwVT086540; Tue, 7 Mar 2017 22:11:58 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v27MBwre086539; Tue, 7 Mar 2017 22:11:58 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201703072211.v27MBwre086539@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Tue, 7 Mar 2017 22:11:58 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r314885 - head/sys/powerpc/ofw X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Mar 2017 22:11:59 -0000 Author: jhibbits Date: Tue Mar 7 22:11:57 2017 New Revision: 314885 URL: https://svnweb.freebsd.org/changeset/base/314885 Log: Fix booting with >4GB RAM on PowerMac G5 hardware === From Nathan Whitehorn: Open Firmware runs in virtual mode on the Powermac G5. This runs inside the kernel page table, which preserves all address translations made by OF before the kernel starts; as a result, the kernel address space is a strict superset of OF's. Where this explodes is if OF uses an unmapped SLB entry. The SLB fault handler runs in real mode and refers to the PCPU pointer in SPRG0, which blows up the kernel. Having a value of SPRG0 that works for the kernel is less fatal than preserving OF's value in this case. === The result of this is seemingly random panics from NULL dereferences, or hangs immediately upon boot. By not restoring SPRG0 for Open Firmware entry the kernel PCPU pointer is preserved and SLB faults are successful, resulting in a stable kernel. PR: 205458 Reported by: several (over bugzilla, lists, IRC) Reviewed by: andreast Tested by: many (various forms) MFC after: 2 weeks Modified: head/sys/powerpc/ofw/ofw_machdep.c Modified: head/sys/powerpc/ofw/ofw_machdep.c ============================================================================== --- head/sys/powerpc/ofw/ofw_machdep.c Tue Mar 7 21:47:54 2017 (r314884) +++ head/sys/powerpc/ofw/ofw_machdep.c Tue Mar 7 22:11:57 2017 (r314885) @@ -111,6 +111,15 @@ ofw_sprg_prepare(void) * Assume that interrupt are disabled at this point, or * SPRG1-3 could be trashed */ +#ifdef __powerpc64__ + __asm __volatile("mtsprg1 %0\n\t" + "mtsprg2 %1\n\t" + "mtsprg3 %2\n\t" + : + : "r"(ofmsr[2]), + "r"(ofmsr[3]), + "r"(ofmsr[4])); +#else __asm __volatile("mfsprg0 %0\n\t" "mtsprg0 %1\n\t" "mtsprg1 %2\n\t" @@ -121,6 +130,7 @@ ofw_sprg_prepare(void) "r"(ofmsr[2]), "r"(ofmsr[3]), "r"(ofmsr[4])); +#endif } static __inline void @@ -136,7 +146,9 @@ ofw_sprg_restore(void) * * PCPU data cannot be used until this routine is called ! */ +#ifndef __powerpc64__ __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); +#endif } #endif @@ -344,8 +356,9 @@ OF_initial_setup(void *fdt_ptr, void *ju ofmsr[0] = mfmsr(); #ifdef __powerpc64__ ofmsr[0] &= ~PSL_SF; - #endif + #else __asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1])); + #endif __asm __volatile("mfsprg1 %0" : "=&r"(ofmsr[2])); __asm __volatile("mfsprg2 %0" : "=&r"(ofmsr[3])); __asm __volatile("mfsprg3 %0" : "=&r"(ofmsr[4]));