From owner-svn-src-head@freebsd.org Sat Sep 19 11:27:16 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id EA79A3DB596; Sat, 19 Sep 2020 11:27:16 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4BtpMS5t5Vz3RQW; Sat, 19 Sep 2020 11:27:16 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id AC604B429; Sat, 19 Sep 2020 11:27:16 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 08JBRGjH022716; Sat, 19 Sep 2020 11:27:16 GMT (envelope-from mmel@FreeBSD.org) Received: (from mmel@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 08JBRG6V022715; Sat, 19 Sep 2020 11:27:16 GMT (envelope-from mmel@FreeBSD.org) Message-Id: <202009191127.08JBRG6V022715@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mmel set sender to mmel@FreeBSD.org using -f From: Michal Meloun Date: Sat, 19 Sep 2020 11:27:16 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r365900 - head/sys/arm64/rockchip X-SVN-Group: head X-SVN-Commit-Author: mmel X-SVN-Commit-Paths: head/sys/arm64/rockchip X-SVN-Commit-Revision: 365900 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Sep 2020 11:27:17 -0000 Author: mmel Date: Sat Sep 19 11:27:16 2020 New Revision: 365900 URL: https://svnweb.freebsd.org/changeset/base/365900 Log: Implement workaround for broken access to configuration space. Due to a HW bug in the RockChip PCIe implementation, attempting to access a non-existent register in the configuration space will throw an exception. Use new bus functions bus_peek() and bus_poke() to overcomme this limitation. Modified: head/sys/arm64/rockchip/rk_pcie.c Modified: head/sys/arm64/rockchip/rk_pcie.c ============================================================================== --- head/sys/arm64/rockchip/rk_pcie.c Sat Sep 19 11:06:41 2020 (r365899) +++ head/sys/arm64/rockchip/rk_pcie.c Sat Sep 19 11:27:16 2020 (r365900) @@ -310,7 +310,7 @@ rk_pcie_check_dev(struct rk_pcie_softc *sc, u_int bus, uint32_t val; if (bus < sc->bus_start || bus > sc->bus_end || slot > PCI_SLOTMAX || - func > PCI_FUNCMAX || reg > PCI_REGMAX) + func > PCI_FUNCMAX || reg > PCIE_REGMAX) return (false); if (bus == sc->root_bus) { @@ -325,8 +325,8 @@ rk_pcie_check_dev(struct rk_pcie_softc *sc, u_int bus, if (STATUS1_LINK_ST_GET(val) != STATUS1_LINK_ST_UP) return (false); - /* only one device is on first subordinate bus */ - if (bus == sc->sub_bus && slot) + /* only one device can be on first subordinate bus */ + if (bus == sc->sub_bus && slot != 0 ) return (false); return (true); } @@ -452,45 +452,41 @@ rk_pcie_read_config(device_t dev, u_int bus, u_int slo u_int func, u_int reg, int bytes) { struct rk_pcie_softc *sc; - uint32_t data; + uint32_t d32, data; + uint16_t d16; + uint8_t d8; uint64_t addr; - int type; + int type, ret; sc = device_get_softc(dev); if (!rk_pcie_check_dev(sc, bus, slot, func, reg)) return (0xFFFFFFFFU); - if (bus == sc->root_bus) return (rk_pcie_local_cfg_read(sc, false, reg, bytes)); addr = ATU_CFG_BUS(bus) | ATU_CFG_SLOT(slot) | ATU_CFG_FUNC(func) | ATU_CFG_REG(reg); - if (bus == sc->sub_bus) { - type = ATU_TYPE_CFG0; - } else { - type = ATU_TYPE_CFG1; - /* - * XXX FIXME: any attempt to generate type1 configuration - * access causes external data abort - */ - return (0xFFFFFFFFU); - } + type = bus == sc->sub_bus ? ATU_TYPE_CFG0: ATU_TYPE_CFG1; rk_pcie_map_cfg_atu(sc, 0, type); + ret = -1; switch (bytes) { case 1: - data = bus_read_1(sc->axi_mem_res, addr); + ret = bus_peek_1(sc->axi_mem_res, addr, &d8); + data = d8; break; case 2: - data = bus_read_2(sc->axi_mem_res, addr); + ret = bus_peek_2(sc->axi_mem_res, addr, &d16); + data = d16; break; case 4: - data = bus_read_4(sc->axi_mem_res, addr); + ret = bus_peek_4(sc->axi_mem_res, addr, &d32); + data = d32; break; - default: - data = 0xFFFFFFFFU; } + if (ret != 0) + data = 0xFFFFFFFF; return (data); } @@ -512,27 +508,18 @@ rk_pcie_write_config(device_t dev, u_int bus, u_int sl addr = ATU_CFG_BUS(bus) | ATU_CFG_SLOT(slot) | ATU_CFG_FUNC(func) | ATU_CFG_REG(reg); - if (bus == sc->sub_bus){ - type = ATU_TYPE_CFG0; - } else { - type = ATU_TYPE_CFG1; - /* - * XXX FIXME: any attempt to generate type1 configuration - * access causes external data abort - */ - return; - } + type = bus == sc->sub_bus ? ATU_TYPE_CFG0: ATU_TYPE_CFG1; rk_pcie_map_cfg_atu(sc, 0, type); switch (bytes) { case 1: - bus_write_1(sc->axi_mem_res, addr, val); + bus_poke_1(sc->axi_mem_res, addr, (uint8_t)val); break; case 2: - bus_write_2(sc->axi_mem_res, addr, val); + bus_poke_2(sc->axi_mem_res, addr, (uint16_t)val); break; case 4: - bus_write_4(sc->axi_mem_res, addr, val); + bus_poke_4(sc->axi_mem_res, addr, val); break; default: break;