From owner-p4-projects@FreeBSD.ORG Thu Nov 13 22:12:08 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 3E00216A4D0; Thu, 13 Nov 2003 22:12:08 -0800 (PST) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id E7FC516A4FE for ; Thu, 13 Nov 2003 22:12:07 -0800 (PST) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6685443FAF for ; Thu, 13 Nov 2003 22:12:07 -0800 (PST) (envelope-from jmallett@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.9/8.12.9) with ESMTP id hAE6C7XJ098077 for ; Thu, 13 Nov 2003 22:12:07 -0800 (PST) (envelope-from jmallett@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.9/8.12.9/Submit) id hAE6C6sa098074 for perforce@freebsd.org; Thu, 13 Nov 2003 22:12:06 -0800 (PST) (envelope-from jmallett@freebsd.org) Date: Thu, 13 Nov 2003 22:12:06 -0800 (PST) Message-Id: <200311140612.hAE6C6sa098074@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jmallett@freebsd.org using -f From: Juli Mallett To: Perforce Change Reviews Subject: PERFORCE change 42308 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Nov 2003 06:12:08 -0000 http://perforce.freebsd.org/chv.cgi?CH=42308 Change 42308 by jmallett@jmallett_dalek on 2003/11/13 22:11:32 some xkphys cca bits, nuke some cruft nearby. Affected files ... .. //depot/projects/mips/sys/mips/include/cpuregs.h#15 edit Differences ... ==== //depot/projects/mips/sys/mips/include/cpuregs.h#15 (text+ko) ==== @@ -94,13 +94,19 @@ #define MIPS_KSEG1_TO_PHYS(x) ((vm_offset_t)(x) & MIPS_PHYS_MASK) #define MIPS_PHYS_TO_KSEG1(x) ((vm_offset_t)(x) | MIPS_KSEG1_START) -/* Map virtual address to index in mips3 r4k virtually-indexed cache */ -#define MIPS_VA_TO_CINDEX(x) \ - ((vm_offset_t)(x) & 0xffffff | MIPS_KSEG0_START) - #define MIPS_PHYS_TO_XKPHYS(cca,x) \ ((0x2ULL << 62) | ((unsigned long long)(cca) << 59) | (x)) #define MIPS_XKPHYS_TO_PHYS(x) ((x) & 0x0effffffffffffffULL) + /* Uncached */ +#define MIPS_XKPHYS_UC (2) + /* Cacheable noncoherent */ +#define MIPS_XKPHYS_CNC (3) + /* Cacheable coherent exclusive */ +#define MIPS_XKPHYS_CCE (4) + /* Cacheable coherent exclusive on write */ +#define MIPS_XKPHYS_CCEW (5) + /* Cacheable coherent update on write */ +#define MIPS_XKPHYS_CCUW (6) /* CPU dependent mtc0 hazard hook */ #define COP0_SYNC /* nothing */