From owner-p4-projects@FreeBSD.ORG Sun Mar 7 15:33:22 2010 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 7AB631065672; Sun, 7 Mar 2010 15:33:22 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3F34E106564A for ; Sun, 7 Mar 2010 15:33:22 +0000 (UTC) (envelope-from raj@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 2D21A8FC08 for ; Sun, 7 Mar 2010 15:33:22 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id o27FXMPV086510 for ; Sun, 7 Mar 2010 15:33:22 GMT (envelope-from raj@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id o27FXM7K086508 for perforce@freebsd.org; Sun, 7 Mar 2010 15:33:22 GMT (envelope-from raj@freebsd.org) Date: Sun, 7 Mar 2010 15:33:22 GMT Message-Id: <201003071533.o27FXM7K086508@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to raj@freebsd.org using -f From: Rafal Jaworowski To: Perforce Change Reviews Precedence: bulk Cc: Subject: PERFORCE change 175450 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 07 Mar 2010 15:33:22 -0000 http://p4web.freebsd.org/chv.cgi?CH=175450 Change 175450 by raj@raj_nand on 2010/03/07 15:32:38 Prepare Marvell DB-78XXX to use its NAND controller. This is going to be our guinea pig target for the NAND-related work. Obtained from: Juniper Networks, Semihalf Affected files ... .. //depot/projects/nand2/sys/arm/mv/discovery/db78xxx.c#2 edit .. //depot/projects/nand2/sys/arm/mv/discovery/discovery.c#2 edit .. //depot/projects/nand2/sys/arm/mv/mvwin.h#2 edit Differences ... ==== //depot/projects/nand2/sys/arm/mv/discovery/db78xxx.c#2 (text+ko) ==== @@ -95,6 +95,13 @@ VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE, }, + { /* NAND */ + MV_DEV_CS2_PHYS_BASE, + MV_DEV_CS2_PHYS_BASE, + MV_DEV_CS2_SIZE, + VM_PROT_READ | VM_PROT_WRITE, + PTE_NOCACHE, + }, { 0, 0, 0, 0, 0, } }; ==== //depot/projects/nand2/sys/arm/mv/discovery/discovery.c#2 (text+ko) ==== @@ -99,6 +99,12 @@ { -1 }, CPU_PM_CTRL_XOR }, + { "nand", MV_NAND_BASE, MV_NAND_SIZE, + { -1 }, + { -1 }, + CPU_PM_CTRL_NONE + }, + { "ehci", MV_USB0_BASE, MV_USB_SIZE, { MV_INT_USB_ERR, MV_INT_USB0, -1 }, { -1 }, ==== //depot/projects/nand2/sys/arm/mv/mvwin.h#2 (text+ko) ==== @@ -71,6 +71,7 @@ /* CS2: 32MB NAND FLASH */ #define MV_DEV_CS2_PHYS_BASE (MV_DEV_CS1_PHYS_BASE + MV_DEV_CS1_SIZE) #define MV_DEV_CS2_SIZE 1024 /* XXX u-boot has 1MB */ +#define MV_NAND_FLASH MV_DEV_CS2_PHYS_BASE #define MV_CESA_SRAM_PHYS_BASE 0xFD000000 #define MV_CESA_SRAM_BASE MV_CESA_SRAM_PHYS_BASE /* VA == PA mapping */ @@ -91,6 +92,8 @@ #define MV_GPIO_SIZE 0x20 #define MV_RTC_BASE (MV_BASE + 0x10300) #define MV_RTC_SIZE 0x08 +#define MV_NAND_BASE (MV_BASE + 0x10400) +#define MV_NAND_SIZE 0x80 #define MV_TWSI0_BASE (MV_BASE + 0x11000) #define MV_TWSI1_BASE (MV_BASE + 0x11100) #define MV_TWSI_SIZE 0x20