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Date:      Thu, 6 Apr 2006 10:20:13 GMT
From:      Andrew Belashov <bel@orel.ru>
To:        freebsd-sparc64@FreeBSD.org
Subject:   Re: sparc64/94778: panic in intr_fast()
Message-ID:  <200604061020.k36AKDLU003766@freefall.freebsd.org>

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The following reply was made to PR sparc64/94778; it has been noted by GNATS.

From: Andrew Belashov <bel@orel.ru>
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: sparc64/94778: panic in intr_fast()
Date: Thu, 06 Apr 2006 14:16:25 +0400

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 Previous experimental patch is bad. Don't use it!
 
 I have understood the reason of a panic. The keyboard, mouse
 and other uart interrupts have greater PIL than the others.
 When the intr_fast() processes interrupt request queue, new
 interruption comes from mouse or keyboard.  In that case,
 some interruptions from queue can be processed twice...
 
 Please commit following patch and close the PR.
 
 --
 With Best Regards,
 Andrew Belashov.
 
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  filename="interrupt.S.patch"
 
 --- sys/sparc64/sparc64/interrupt.S.orig	Sat Apr 16 19:05:56 2005
 +++ sys/sparc64/sparc64/interrupt.S	Thu Apr  6 10:18:39 2006
 @@ -152,16 +152,20 @@
  ENTRY(intr_fast)
  	save	%sp, -CCFSZ, %sp
  
 -1:	ldx	[PCPU(IRHEAD)], %l0
 +	/*
 +	 * Disable interrupts before loading the interrupt request pointer.
 +	 * It prevents double processing interruptions.
 +	 */
 +1:	wrpr	%g0, PSTATE_NORMAL, %pstate /* Disable interrupts */
 +	ldx	[PCPU(IRHEAD)], %l0
  	brnz,a,pt %l0, 2f
  	 nop
 +	wrpr	%g0, PSTATE_KERNEL, %pstate /* Enable interrupts */
  
  	ret
  	 restore
  
 -2:	wrpr	%g0, PSTATE_NORMAL, %pstate
 -
 -	ldx	[%l0 + IR_NEXT], %l1
 +2:	ldx	[%l0 + IR_NEXT], %l1
  	brnz,pt	%l1, 3f
  	 stx	%l1, [PCPU(IRHEAD)]
  	PCPU_ADDR(IRHEAD, %l1)
 @@ -187,8 +191,9 @@
  	stx	%l1, [%l0 + IR_NEXT]
  	stx	%l0, [PCPU(IRFREE)]
  
 -	wrpr	%g0, PSTATE_KERNEL, %pstate
 +	wrpr	%g0, PSTATE_KERNEL, %pstate /* Enable interrupts */
  
 +	KASSERT(%o0, "intr_fast: ir_func null")
  	call	%o0
  	 mov	%o1, %o0
  	ba,a	%xcc, 1b
 
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