From owner-p4-projects@FreeBSD.ORG Mon Mar 13 20:17:11 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id C3A9E16A41F; Mon, 13 Mar 2006 20:17:11 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 6787316A400 for ; Mon, 13 Mar 2006 20:17:06 +0000 (UTC) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id D37CB43D5D for ; Mon, 13 Mar 2006 20:16:59 +0000 (GMT) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.1/8.13.1) with ESMTP id k2DKGx1T057557 for ; Mon, 13 Mar 2006 20:16:59 GMT (envelope-from kmacy@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.1/8.13.1/Submit) id k2DKGxrX057554 for perforce@freebsd.org; Mon, 13 Mar 2006 20:16:59 GMT (envelope-from kmacy@freebsd.org) Date: Mon, 13 Mar 2006 20:16:59 GMT Message-Id: <200603132016.k2DKGxrX057554@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to kmacy@freebsd.org using -f From: Kip Macy To: Perforce Change Reviews Cc: Subject: PERFORCE change 93258 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Mar 2006 20:17:12 -0000 http://perforce.freebsd.org/chv.cgi?CH=93258 Change 93258 by kmacy@kmacy_storage:sun4v_work on 2006/03/13 20:16:03 substantially thin down the trapframe fix stack pointer manipulation when returning to user-mode disable clock interrupts for the moment to guarantee deterministic behaviour on bringup fix syscall trap handling to follow new register conventions add support for data protection fault without software write bit set Affected files ... .. //depot/projects/kmacy_sun4v/src/sys/sparc64/sparc64/genassym.c#9 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/frame.h#2 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#28 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/intr_machdep.c#4 edit Differences ... ==== //depot/projects/kmacy_sun4v/src/sys/sparc64/sparc64/genassym.c#9 (text+ko) ==== @@ -317,16 +317,20 @@ ASSYM(TF_FPRS, offsetof(struct trapframe, tf_fprs)); ASSYM(TF_FSR, offsetof(struct trapframe, tf_fsr)); ASSYM(TF_GSR, offsetof(struct trapframe, tf_gsr)); +ASSYM(TF_PIL, offsetof(struct trapframe, tf_pil)); +#ifndef SUN4V ASSYM(TF_LEVEL, offsetof(struct trapframe, tf_level)); -ASSYM(TF_PIL, offsetof(struct trapframe, tf_pil)); ASSYM(TF_SFAR, offsetof(struct trapframe, tf_sfar)); ASSYM(TF_SFSR, offsetof(struct trapframe, tf_sfsr)); ASSYM(TF_TAR, offsetof(struct trapframe, tf_tar)); +#endif ASSYM(TF_TNPC, offsetof(struct trapframe, tf_tnpc)); ASSYM(TF_TPC, offsetof(struct trapframe, tf_tpc)); ASSYM(TF_TSTATE, offsetof(struct trapframe, tf_tstate)); +#if 0 ASSYM(TF_TYPE, offsetof(struct trapframe, tf_type)); ASSYM(TF_Y, offsetof(struct trapframe, tf_y)); +#endif ASSYM(TF_WSTATE, offsetof(struct trapframe, tf_wstate)); ASSYM(TF_SIZEOF, sizeof(struct trapframe)); ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/frame.h#2 (text+ko) ==== @@ -39,21 +39,15 @@ struct trapframe { uint64_t tf_global[8]; uint64_t tf_out[8]; + uint64_t tf_pad[8]; uint64_t tf_fprs; uint64_t tf_fsr; uint64_t tf_gsr; - uint64_t tf_level; uint64_t tf_pil; - uint64_t tf_sfar; - uint64_t tf_sfsr; - uint64_t tf_tar; + uint64_t tf_tpc; uint64_t tf_tnpc; - uint64_t tf_tpc; uint64_t tf_tstate; - uint64_t tf_type; - uint64_t tf_y; uint64_t tf_wstate; - uint64_t tf_pad[2]; }; #define tf_sp tf_out[6] ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/exception.S#28 (text+ko) ==== @@ -211,6 +211,8 @@ */ .macro tl0_gen type MAGIC_TRAP_ON + MAGIC_TRAP_ON + MAGIC_EXIT tl0_setup \type .align 32 .endm @@ -226,9 +228,8 @@ tl0_gen T_RESERVED #else MAGIC_TRAP_ON;MAGIC_TRAP_ON;MAGIC_EXIT +#endif .align 32 -#endif - .endr .endm @@ -309,30 +310,31 @@ .endm .macro tl0_align - MAGIC_TRAP_ON - MAGIC_TRAP_ON - MAGIC_TRAP_ON MAGIC_TRAP_ON;MAGIC_TRAP_ON;MAGIC_EXIT .align 32 .endm .macro cpu_mondo MAGIC_TRAP_ON + MAGIC_EXIT .align 32 .endm .macro dev_mondo MAGIC_TRAP_ON + MAGIC_EXIT .align 32 .endm .macro resumable_error MAGIC_TRAP_ON + MAGIC_EXIT .align 32 .endm .macro nonresumable_error MAGIC_TRAP_ON + MAGIC_EXIT .align 32 .endm @@ -482,6 +484,7 @@ .macro spill_64bit_tt1_secondary_so1 MAGIC_TRAP_ON + MAGIC_EXIT ba,a,pt %xcc, fault_64bit_so1 nop .align 128 @@ -490,11 +493,13 @@ .macro spill_mixed MAGIC_TRAP_ON + MAGIC_EXIT .align 128 .endm .macro fill_mixed MAGIC_TRAP_ON + MAGIC_EXIT .align 128 .endm @@ -505,22 +510,21 @@ .align 32 .endm -ENTRY(tl0_sfsr_trap) - tl0_split - clr %o1 - set trap, %o2 - mov %g3, %o4 - mov %g4, %o5 - ba %xcc, tl0_utrap - mov %g2, %o0 -END(tl0_sfsr_trap) - .macro tl0_pil_entry level, mask +#if 0 set \mask, %g1 clr %g2 clr %g3 ba %xcc, tl0_intr mov \level, %g4 +#endif + mov 1, %g2 + sllx %g2, \level, %g1 + sllx %g2, 16, %g3 + or %g1, %g3, %g3 + or %g2, %g3, %g2 + wr %g2, %g0, %clear_softint + retry .align 32 .endm @@ -581,11 +585,11 @@ .endm .macro tl0_syscall - tl0_split - clr %o1 - set syscall, %o2 + clr %g3 + mov -1, %g4 + set syscall, %g1 ba %xcc, tl0_trap - mov T_SYSCALL, %o0 + mov T_SYSCALL, %g2 .align 32 .endm @@ -704,10 +708,15 @@ spill_mixed ! 0x9c tl0_spill_n_other_a0: tl0_reserved 4 ! 0xa0 +tl0_spill_n_other_a4: spill_32bit_secondary_so0 ! 0xa4 +tl0_spill_n_other_a8: spill_64bit_secondary_so0 ! 0xa8 +tl0_spill_n_other_ac: spill_32bit_secondary_so0 ! 0xac +tl0_spill_n_other_b0: spill_64bit_secondary_so0 ! 0xb0 +tl0_spill_n_other_b4: tl0_reserved 12 ! 0xb4-0xbf tl0_fill_n_normal_c0: tl0_reserved 4 ! 0xc0 @@ -921,14 +930,13 @@ b user_rtt nop common_utrap: - stx %o1, [%l7 + TF_TYPE] ! save trap type - stx %o2, [%l7 + TF_TAR] ! save mem info jmpl %l3, %o7 ! call trap handler mov %l7, %o0 + GET_PCB(%g6) + sub %g6, CCFSZ + SPOFF + TF_SIZEOF, %sp + add %sp, REGOFF + SPOFF, %l7 ENTRY(user_rtt) - GET_PCB(%g6) - add %sp, CCFSZ + SPOFF, %l7 ! pil handling needs to be re-visited wrpr %g0, PIL_TICK, %pil ldx [PCPU(CURTHREAD)], %l0 @@ -949,14 +957,13 @@ brz,a,pt %l1, 2f nop wrpr %g0, 0, %pil - mov T_SPILL, %o0 - stx %o0, [%l7 + SPOFF + CCFSZ + TF_TYPE] + mov T_SPILL, %o1 call trap mov %l7, %o0 ba,a %xcc, user_rtt nop 2: - ld [%sp + SPOFF + TF_WSTATE], %l3 + ld [%l7 + TF_WSTATE], %l3 ! ! restore user globals and outs ! @@ -985,9 +992,9 @@ ldx [%l7 + TF_TNPC], %g2 ldx [%l7 + TF_TSTATE], %l0 andn %l0, TSTATE_CWP_MASK, %g7 + wrpr %g1, %tpc wrpr %g2, %tnpc - ! ! switch "other" windows back to "normal" windows and ! restore to window we originally trapped in @@ -1067,15 +1074,16 @@ wrpr %g0, %g1, %cleanwin rdpr %cwp, %g1 wrpr %g1, %g7, %tstate +! MAGIC_TRAP_ON retry END(user_rtt) END(utl0) ENTRY(ktl0) + GET_PCPU_SCRATCH SAVE_GLOBALS(%l7) SAVE_OUTS(%l7) ! for the call bug workaround wrpr %g0, PSTATE_KERNEL, %pstate ! enable ints -! MAGIC_TRAP_OFF brnz %o1, common_ktrap nop @@ -1088,14 +1096,10 @@ b common_rtt nop common_ktrap: - stx %o1, [%l7 + TF_TYPE] ! save trap type - stx %o2, [%l7 + TF_TAR] ! save mem info jmpl %l3, %o7 ! call trap handler mov %l7, %o0 -! MAGIC_TRAP_ON ENTRY(krtt) - MAGIC_TRAP_ON common_rtt: ! ! restore globals and outs @@ -1144,7 +1148,6 @@ ! rdpr %cwp, %g1 wrpr %g1, %g7, %tstate - MAGIC_TRAP_OFF retry END(krtt) END(ktl0) @@ -1200,8 +1203,9 @@ rdpr %tstate, %g5 btst TSTATE_PRIV, %g5 and %g5, TSTATE_CWP_MASK, %g6 + wrpr %g0, %g6, %cwp bnz,pn %xcc, tl0_ktrap - wrpr %g0, %g6, %cwp + nop ENTRY(tl0_utrap) #ifdef notyet /* we need to determine from the hardware the number of register windows */ @@ -1210,7 +1214,6 @@ #else mov nwin_minus_one, %g5 #endif - MAGIC_TRAP_ON GET_PCB(%g6) wrpr %g0, %g5, %cleanwin sub %g6, SPOFF + CCFSZ + TF_SIZEOF, %g6 @@ -1279,7 +1282,7 @@ -! %g3==TTE flags +! %g3==trap type ! %g4==fault type (if data miss) ! %g5==fault addr ! internal usage: @@ -1296,7 +1299,6 @@ cmp %g6, %g0 ! kernel? be,pn %xcc, 1f srlx %g5, TTARGET_VA_SHIFT, %g1 - MAGIC_TRAP_ON GET_HASH_SCRATCH_USER(%g2) ba,pt %xcc, 2f sllx %g6, TTARGET_CTX_SHIFT, %g6 @@ -1306,18 +1308,21 @@ 2: or %g6, %g1, %g6 ! %g6 == search tag - - - ! %g4 == fault type %g5 == fault addr %g6 == tag ! XXX only handle normal miss for now (look at fault type in the future) #ifdef PMAP_DEBUG - cmp %g6, %g0 ! NULL ptr deref in kernel - bne,pt %xcc, 3f + cmp %g5, %g0 ! NULL ptr deref + bne,pt %xcc, 3f nop tsb_miss_null_deref: MAGIC_TRAP_ON;MAGIC_TRAP_ON;MAGIC_EXIT ! give up -3: +3: + cmp %g3, T_INSTRUCTION_MISS + bne,pn %xcc, 17f + nop +! MAGIC_TRAP_ON ! enable debugging for instruction misses +17: + #endif tsb_miss_compute_hash_addr: sethi %hi(PAGE_SIZE), %g7 @@ -1337,7 +1342,7 @@ ! %g2==entry base add %g2, %g4, %g2 ! base + offset == entry base - mov %g5, %g7 + mov %g5, %g7 ! save fault addr ! entry 0 ! %g1 == abs index %g2 == THE pointer %g3 == flags ! %g4 <- tag %g5 <- data @@ -1399,6 +1404,10 @@ #endif 16: #endif + srlx %g7, 13, %g7 ! slow painful way of masking off + sllx %g7, 13, %g7 ! bottom bits without using a reg + ! XXX FIXME + mov %g3, %g2 ! save fault type srlx %g6, TTARGET_CTX_SHIFT, %g4 ! recover context sethi %hi(trap), %g1 @@ -1411,8 +1420,9 @@ 5: !found ! %g1 == abs index %g2 == THE pointer %g3 == flags ! %g4 == tag %g5 == data %g7 == PAGE_MASK - ! %g3 <- TSB RA %g6 <- TSB size, TTE RA + ! %g3 <- TSB RA %g6 <- TSB size, TTE RA %g7 == PAGE_MASK srlx %g6, TTARGET_CTX_SHIFT, %g6 + or %g7, %g6, %g6 ! save context and fault addr ! will break when ctxbits > 13 sethi %hi(PAGE_SIZE), %g7 @@ -1464,7 +1474,6 @@ #endif stxa %g4, [%g2]ASI_REAL ! store tag stxa %g5, [%g2 + %g7]ASI_REAL ! store data - MAGIC_TRAP_OFF ! XXX the following intstruction should be replaced with a ! retry on HVs that do auto-demap @@ -1495,8 +1504,16 @@ /* * Write to read-only page */ -ENTRY(prot_fault_trap) - MAGIC_TRAP_ON;MAGIC_TRAP_ON;MAGIC_EXIT +! %g4==tag +! %g5==TTE +! %g6==fault addr | context +ENTRY(prot_fault_trap) + sethi %hi(trap), %g1 + mov T_DATA_PROTECTION, %g2 + mov %g6, %g3 + mov -1, %g4 + ba %xcc, tl0_trap + or %g1, %lo(trap), %g1 END(prot_fault_trap) /* * Programming error @@ -1527,9 +1544,9 @@ mov %l0, %o0 mov %l1, %o1 call fork_exit - mov %l2, %o2 + mov %l2, %o2 + add %sp, CCFSZ + SPOFF, %l7 ba,a,pt %xcc, user_rtt - nop END(fork_trampoline) @@ -1568,6 +1585,7 @@ * caused by interrupts occuring after the test. If the pil is lowered, * as it is when we call ast, the check must be re-executed. */ + ta 0x71 wrpr %g0, PIL_TICK, %pil ldx [PCPU(CURTHREAD)], %l0 lduw [%l0 + TD_FLAGS], %l1 @@ -1599,7 +1617,6 @@ nop wrpr %g0, 0, %pil mov T_SPILL, %o0 - stx %o0, [%sp + SPOFF + CCFSZ + TF_TYPE] call trap add %sp, SPOFF + CCFSZ, %o0 ba,a %xcc, tl0_ret @@ -1633,7 +1650,6 @@ ldx [%sp + SPOFF + CCFSZ + TF_TNPC], %l2 ldx [%sp + SPOFF + CCFSZ + TF_TPC], %l3 ldx [%sp + SPOFF + CCFSZ + TF_TSTATE], %l4 - ldx [%sp + SPOFF + CCFSZ + TF_Y], %l5 ldx [%sp + SPOFF + CCFSZ + TF_WSTATE], %l6 /* @@ -1822,7 +1838,6 @@ * stack to copyin. */ mov T_FILL_RET, %o0 - stx %o0, [%sp + SPOFF + CCFSZ + TF_TYPE] call trap add %sp, SPOFF + CCFSZ, %o0 ba,a %xcc, tl0_ret ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/intr_machdep.c#4 (text+ko) ==== @@ -207,7 +207,7 @@ intr_stray_level(struct trapframe *tf) { - printf("stray level interrupt %ld\n", tf->tf_level); + printf("stray level interrupt\n"); } static void