From owner-freebsd-alpha@FreeBSD.ORG Thu Aug 7 12:22:40 2003 Return-Path: Delivered-To: freebsd-alpha@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id C37BC37B407; Thu, 7 Aug 2003 12:22:40 -0700 (PDT) Received: from mail.pcnet.com (mail.pcnet.com [204.213.232.4]) by mx1.FreeBSD.org (Postfix) with ESMTP id 1DA0A43F3F; Thu, 7 Aug 2003 12:22:40 -0700 (PDT) (envelope-from eischen@vigrid.com) Received: from mail.pcnet.com (mail.pcnet.com [204.213.232.4]) by mail.pcnet.com (8.12.8/8.12.1) with ESMTP id h77JMbuN003804; Thu, 7 Aug 2003 15:22:37 -0400 (EDT) Date: Thu, 7 Aug 2003 15:22:37 -0400 (EDT) From: Daniel Eischen X-Sender: eischen@pcnet5.pcnet.com To: "Portante, Peter" In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII cc: deischen@freebsd.org cc: alpha@freebsd.org cc: Marcel Moolenaar Subject: RE: Atomic swap X-BeenThere: freebsd-alpha@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list Reply-To: deischen@freebsd.org List-Id: Porting FreeBSD to the Alpha List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Aug 2003 19:22:41 -0000 On Thu, 7 Aug 2003, Portante, Peter wrote: > Dan, > > > ---------- > > From: Daniel Eischen > > Reply To: deischen@freebsd.org > > Sent: Thursday, August 7, 2003 3:05 PM > > To: Marcel Moolenaar > > Cc: Portante, Peter; alpha@freebsd.org; deischen@freebsd.org > > Subject: Re: Atomic swap > > > > On Thu, 7 Aug 2003, Marcel Moolenaar wrote: > > > > > static __inline void > > > atomic_swap_long(volatile long *dst, long val, long *res) > > > { > > > __asm ( "1: ldq_l t0,%0\n" > > > " mov %1,t1\n" > > > > If I swap the first 2 instructions: > > > > __asm ( "1: mov %1,t1\n" > > ldq_l t0,%0\n" > > > > that eliminates 1 instruction from between the locked > > instructions. Is there anything wrong with doing that? > > > Actually, the processor has a chance to do something while waiting for > memory, so it does not hurt to have the mov inside the ldq_l/stq_c pair. I'm just thinking that it could narrow the window in which you can get a contention, but if the window is the same regardless of the order of those 2 instructions, then that's OK. -- Dan Eischen