From owner-svn-src-head@freebsd.org Thu Dec 29 21:55:24 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8283FC96E61; Thu, 29 Dec 2016 21:55:24 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 51CA01366; Thu, 29 Dec 2016 21:55:24 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id uBTLtNUF022329; Thu, 29 Dec 2016 21:55:23 GMT (envelope-from gonzo@FreeBSD.org) Received: (from gonzo@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id uBTLtNc5022328; Thu, 29 Dec 2016 21:55:23 GMT (envelope-from gonzo@FreeBSD.org) Message-Id: <201612292155.uBTLtNc5022328@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: gonzo set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko Date: Thu, 29 Dec 2016 21:55:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r310791 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Dec 2016 21:55:24 -0000 Author: gonzo Date: Thu Dec 29 21:55:23 2016 New Revision: 310791 URL: https://svnweb.freebsd.org/changeset/base/310791 Log: [qemu] Fix VERSATILEPB kernel boot in QEMU broken by r300968 QEMU does not implement hardware debug registers so when dbg_monitor_is_enabled is called kernel receives "invalid instruction" exception. QEMU implements only DIDR register and on read returns all zeroes to indicate that it doesn't support other registers. Real hardware has Version bits set. MFC after: 1 week Modified: head/sys/arm/arm/debug_monitor.c Modified: head/sys/arm/arm/debug_monitor.c ============================================================================== --- head/sys/arm/arm/debug_monitor.c Thu Dec 29 21:36:04 2016 (r310790) +++ head/sys/arm/arm/debug_monitor.c Thu Dec 29 21:55:23 2016 (r310791) @@ -792,10 +792,21 @@ dbg_get_ossr(void) static __inline boolean_t dbg_arch_supported(void) { + uint32_t dbg_didr; switch (dbg_model) { case ID_DFR0_CP_DEBUG_M_V6: case ID_DFR0_CP_DEBUG_M_V6_1: + dbg_didr = cp14_dbgdidr_get(); + /* + * read-all-zeroes is used by QEMU + * to indicate that ARMv6 debug support + * is not implemented. Real hardware has at + * least version bits set + */ + if (dbg_didr == 0) + return (FALSE); + return (TRUE); case ID_DFR0_CP_DEBUG_M_V7: case ID_DFR0_CP_DEBUG_M_V7_1: /* fall through */ return (TRUE);