From owner-freebsd-current@FreeBSD.ORG Thu Aug 14 13:50:58 2003 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id A92AC37B401 for ; Thu, 14 Aug 2003 13:50:58 -0700 (PDT) Received: from hysteria.spc.org (hysteria.spc.org [195.206.69.234]) by mx1.FreeBSD.org (Postfix) with SMTP id 2256243FD7 for ; Thu, 14 Aug 2003 13:50:57 -0700 (PDT) (envelope-from bms@hysteria.spc.org) Received: (qmail 31635 invoked by uid 5013); 14 Aug 2003 20:48:08 -0000 Date: Thu, 14 Aug 2003 21:48:08 +0100 From: Bruce M Simpson To: Petri Helenius Message-ID: <20030814204808.GC1417@spc.org> Mail-Followup-To: Bruce M Simpson , Petri Helenius , Scott Long , freebsd-current@freebsd.org References: <02b701c360de$ed311950$812a40c1@PETEX31> <20030812161353.F85404@carver.gumbysoft.com> <3F399A8A.8070605@freebsd.org> <03d101c3616a$982476a0$812a40c1@PETEX31> <3F3A48B5.9010401@freebsd.org> <056001c361aa$55841540$812a40c1@PETEX31> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <056001c361aa$55841540$812a40c1@PETEX31> User-Agent: Mutt/1.4.1i Organization: SPC cc: freebsd-current@freebsd.org Subject: Re: pci configuration X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Aug 2003 20:50:59 -0000 On Wed, Aug 13, 2003 at 05:51:09PM +0300, Petri Helenius wrote: > > True, those parameters are available, but the original question was > > about reporting the bus width and frequency, which are not available. > How can these parameters be displayed? Generally I measure PCI bus frequency by attaching a poor man's 'bus analyzer'. There are low end ones available. The one I use is called the 'PC Geiger'. This has a CPLD capable of decoding the PCI logic and a small PIC to control the display and which reads some of the CPLD registers. I'm not aware of any chipsets which expose information about the PCI bus clock / bus width in use. A long trawl through datasheets may be in order. BMS