From owner-freebsd-chat Tue Sep 16 20:56:38 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id UAA11351 for chat-outgoing; Tue, 16 Sep 1997 20:56:38 -0700 (PDT) Received: from tor-adm1.nbc.netcom.ca (taob@tor-adm1.nbc.netcom.ca [207.181.89.5]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id UAA11346 for ; Tue, 16 Sep 1997 20:56:35 -0700 (PDT) Received: (from taob@localhost) by tor-adm1.nbc.netcom.ca (8.8.5/8.8.5) id XAA07695; Tue, 16 Sep 1997 23:55:59 -0400 (EDT) Date: Tue, 16 Sep 1997 23:55:59 -0400 (EDT) From: Brian Tao To: Mike Smith cc: FREEBSD-CHAT-L Subject: Re: SMP motherboard advice... In-Reply-To: <199709170337.NAA00422@word.smith.net.au> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-freebsd-chat@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk On Wed, 17 Sep 1997, Mike Smith wrote: > > More to the point, there usually being only one L2 cache for the two > CPUs, and a single P6 being more cost-effective. Do P6 motherboards typically have separate L2 cache for each CPU then? If so, maybe I'll buy a dual PPro motherboard, but start with just a single CPU. Do PPro's still have problems running 16-bit code? > Basically, you'll have to compromise in order to meet both your > goals. Ain't life a bitch? Or hope more cool games are written for X. ;-) -- Brian Tao (BT300, taob@netcom.ca) "Though this be madness, yet there is method in't"