From owner-svn-src-head@FreeBSD.ORG Fri Sep 5 19:00:31 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 0B917791; Fri, 5 Sep 2014 19:00:31 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id EB8D91E9B; Fri, 5 Sep 2014 19:00:30 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s85J0U1J074756; Fri, 5 Sep 2014 19:00:30 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s85J0UeI074755; Fri, 5 Sep 2014 19:00:30 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201409051900.s85J0UeI074755@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Fri, 5 Sep 2014 19:00:30 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r271181 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Sep 2014 19:00:31 -0000 Author: andrew Date: Fri Sep 5 19:00:30 2014 New Revision: 271181 URL: http://svnweb.freebsd.org/changeset/base/271181 Log: Add the virtual timer irq to the list of interrupts we enable on secondary cores. Modified: head/sys/arm/arm/gic.c Modified: head/sys/arm/arm/gic.c ============================================================================== --- head/sys/arm/arm/gic.c Fri Sep 5 18:11:39 2014 (r271180) +++ head/sys/arm/arm/gic.c Fri Sep 5 19:00:30 2014 (r271181) @@ -166,7 +166,10 @@ gic_init_secondary(void) /* Enable interrupt distribution */ gic_d_write_4(GICD_CTLR, 0x01); - /* Activate IRQ 29-30, ie private timer (secure & non-secure) IRQs */ + /* + * Activate the timer interrupts: virtual, secure, and non-secure. + */ + gic_d_write_4(GICD_ISENABLER(27 >> 5), (1UL << (27 & 0x1F))); gic_d_write_4(GICD_ISENABLER(29 >> 5), (1UL << (29 & 0x1F))); gic_d_write_4(GICD_ISENABLER(30 >> 5), (1UL << (30 & 0x1F))); }