From owner-p4-projects@FreeBSD.ORG Sun May 20 03:24:43 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 80D001065672; Sun, 20 May 2012 03:24:43 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 434F4106566C for ; Sun, 20 May 2012 03:24:43 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id E40548FC15 for ; Sun, 20 May 2012 03:24:42 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q4K3Og3Q030478 for ; Sun, 20 May 2012 03:24:42 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q4K3OgGq030475 for perforce@freebsd.org; Sun, 20 May 2012 03:24:42 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Sun, 20 May 2012 03:24:42 GMT Message-Id: <201205200324.q4K3OgGq030475@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson To: Perforce Change Reviews Precedence: bulk Cc: Subject: PERFORCE change 211406 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 20 May 2012 03:24:43 -0000 http://p4web.freebsd.org/@@211406?ac=10 Change 211406 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/05/20 03:24:00 Add new CHERI_MDROOT and CHERI_SDROOT kernel configuration files, derived from similar BERI configurations. Add a new CPU_CHERI CPU definition to supplement the current BERI definitely; the one special-casing of BERI in the kernel also applies to CHERI, so extend it. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/conf/options.mips#3 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/CHERI_MDROOT#1 add .. //depot/projects/ctsrd/cheribsd/src/sys/mips/conf/CHERI_SDROOT#1 add .. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/machdep.c#2 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/conf/options.mips#3 (text+ko) ==== @@ -38,6 +38,7 @@ CPU_RMI opt_global.h CPU_NLM opt_global.h CPU_BERI opt_global.h +CPU_CHERI opt_global.h # XXX These are bogus and should be replaced by proper ABI or ISA checks. ISA_MIPS1 opt_cputype.h ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/machdep.c#2 (text+ko) ==== @@ -351,7 +351,7 @@ * XXXRW: Why don't we install the XTLB handler for all 64-bit * architectures? */ -#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) || defined (CPU_BERI) +#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) || defined(CPU_BERI) || defined(CPU_CHERI) /* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses */ bcopy(MipsTLBMiss, (void *)MIPS3_XTLB_MISS_EXC_VEC, MipsTLBMissEnd - MipsTLBMiss);