Date: Sat, 2 Jun 2012 08:43:21 -0700 From: Marcel Moolenaar <marcelm@juniper.net> To: "powerpc@freebsd.org" <powerpc@freebsd.org> Subject: [P2020] Infinite EXC_ISI on executing /sbin/init Message-ID: <276B630D-417B-4FB1-82C6-676EB31C6275@juniper.net>
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All,
On a P2020 system (kernel configured without SMP -- see other email) we loo=
se
forward progress due to a TLB issue. In a nutshell, this is what I'm seeing=
:
1. The kernel exits to execute the very first instruction of /sbin/init.
2. assumption: the kernel gets a TLB miss exception.
3. assumption: the miss cannot be handled so a fake TLB is created to
trigger an ISI.
4. The kernel gets an ISI and calls vm_fault().
The contents of TLB0 WRT to the process is:
125: ( ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 2 mas1 =3D 0x000201=
00 mas2(va) =3D 0x7fffd004 mas3(pa) =3D 0x01ebe03f
253: ( ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x000301=
00 mas2(va) =3D 0x7fffd004 mas3(pa) =3D 0xffff0000
380: ( ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x000301=
00 mas2(va) =3D 0x7fffc004 mas3(pa) =3D 0xffff0000
381: (V ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x800301=
00 mas2(va) =3D 0x7fffd004 mas3(pa) =3D 0x01ed300f
508: (V ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x800301=
00 mas2(va) =3D 0x7fffc004 mas3(pa) =3D 0x01ed400f
I don't see the fake TLB entry for init's entry point (0x0180000) so I'=
m
not sure (3) above happened.
5. mmu_booke_enter() is called, which flushes the TLB (i.e. removes the
fake entry and adds the real one to the PMAP's page tables.
6. assumptipn: the kernel exists from the ISI trap and gets a TLB miss
exception.
7. normally this can be handled and everything is fine, except what I'm
seeing is that the kernel gets another ISI -- so it looks we're back at
point 3. The TLB contents on second and subsequent ISI exceptions is
effectively the same as given at (4) above:
253: ( ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x000301=
00 mas2(va) =3D 0x7fffd004 mas3(pa) =3D 0xffff0000
380: ( ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x000301=
00 mas2(va) =3D 0x7fffc004 mas3(pa) =3D 0xffff0000
381: (V ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x800301=
00 mas2(va) =3D 0x7fffd004 mas3(pa) =3D 0x01ed300f
508: (V ) [AS=3D0] sz =3D 0x00001000 tsz =3D 1 tid =3D 3 mas1 =3D 0x800301=
00 mas2(va) =3D 0x7fffc004 mas3(pa) =3D 0x01ed400f
Questions:
1. Why don't I see the fake TLB 0 entry for init's entry point?
2. Assuming we're not looking at a TLB miss, what else can cause
the ISI? The RM states that endianness can be another reason
for the ISI, but I don't see anything wrong there.
BTW: I already looked at the I-cache synchronization logic and tweaked it.
No change. I also revisited the I-cache & D-cache enable & invalidate code
and tweaked that too. No change.
In short: I'm running out of ideas.
Could this be related to the other P2020 issue I described:
[P2020] FreeBSD cannot enable 2nd core.
They're both pretty weird and together could indicate some hardware
problem, right?
Then again: A FreeBSD 6.1 derived version boots at least UP...
--=20
Marcel Moolenaar
marcelm@juniper.net
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