From owner-p4-projects@FreeBSD.ORG Fri Jul 14 17:13:06 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 1FEEB16A4E6; Fri, 14 Jul 2006 17:13:06 +0000 (UTC) X-Original-To: perforce@FreeBSD.org Delivered-To: perforce@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id D73C016A4E2 for ; Fri, 14 Jul 2006 17:13:05 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id A4D3043D5A for ; Fri, 14 Jul 2006 17:13:05 +0000 (GMT) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k6EHD594017102 for ; Fri, 14 Jul 2006 17:13:05 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k6EHD5lO017099 for perforce@freebsd.org; Fri, 14 Jul 2006 17:13:05 GMT (envelope-from gonzo@FreeBSD.org) Date: Fri, 14 Jul 2006 17:13:05 GMT Message-Id: <200607141713.k6EHD5lO017099@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 101575 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Jul 2006 17:13:06 -0000 http://perforce.freebsd.org/chv.cgi?CH=101575 Change 101575 by gonzo@gonzo_hq on 2006/07/14 17:12:20 o Uncomment TLB initialization. Affected files ... .. //depot/projects/mips2/src/sys/mips/mips/cpu.c#10 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/mips/cpu.c#10 (text+ko) ==== @@ -222,24 +222,18 @@ /* XXX PCPU */ mips_wtf(&wtf); -#if 0 mips_num_tlb_entries = wtf.wtf_ntlbs; -#endif mips_config_cache(); -#if 0 tlb_invalidate_all(); -#endif mips_vector_init(); /* * XXXMIPS: Leave touching cache until we decide, how we're going to * manage differences between icache and dcache handling between * processors. */ -#if 0 mips_icache_sync_all(); mips_dcache_wbinv_all(); -#endif } void