Date: Mon, 20 Jan 2014 20:55:14 +0000 (UTC) From: Antoine Brodin <antoine@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r340475 - head/cad/verilog-mode.el Message-ID: <201401202055.s0KKtE3d069181@svn.freebsd.org>
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Author: antoine Date: Mon Jan 20 20:55:14 2014 New Revision: 340475 URL: http://svnweb.freebsd.org/changeset/ports/340475 QAT: https://qat.redports.org/buildarchive/r340475/ Log: Stage support Modified: head/cad/verilog-mode.el/Makefile Modified: head/cad/verilog-mode.el/Makefile ============================================================================== --- head/cad/verilog-mode.el/Makefile Mon Jan 20 20:52:54 2014 (r340474) +++ head/cad/verilog-mode.el/Makefile Mon Jan 20 20:55:14 2014 (r340475) @@ -26,10 +26,8 @@ EMACS_NO_BUILD_DEPENDS= yes PLIST_FILES= ${EMACS_SITE_LISPDIR}/${PORTNAME} -NO_STAGE= yes do-install: - @${MKDIR} ${PREFIX}/${EMACS_SITE_LISPDIR} - ${INSTALL_DATA} ${WRKSRC}/${PORTNAME} ${PREFIX}/${EMACS_SITE_LISPDIR} - @${CAT} ${PKGMESSAGE} + @${MKDIR} ${STAGEDIR}${PREFIX}/${EMACS_SITE_LISPDIR} + ${INSTALL_DATA} ${WRKSRC}/${PORTNAME} ${STAGEDIR}${PREFIX}/${EMACS_SITE_LISPDIR} .include <bsd.port.mk>
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