From owner-freebsd-questions@FreeBSD.ORG Wed Dec 24 10:57:13 2003 Return-Path: Delivered-To: freebsd-questions@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 331B016A4CE for ; Wed, 24 Dec 2003 10:57:13 -0800 (PST) Received: from out008.verizon.net (out008pub.verizon.net [206.46.170.108]) by mx1.FreeBSD.org (Postfix) with ESMTP id 32A9943D48 for ; Wed, 24 Dec 2003 10:57:11 -0800 (PST) (envelope-from cswiger@mac.com) Received: from mac.com ([68.161.96.170]) by out008.verizon.net (InterMail vM.5.01.06.06 201-253-122-130-106-20030910) with ESMTP id <20031224185710.BKEB19191.out008.verizon.net@mac.com>; Wed, 24 Dec 2003 12:57:10 -0600 Message-ID: <3FE9E16B.8010203@mac.com> Date: Wed, 24 Dec 2003 13:56:43 -0500 From: Chuck Swiger Organization: The Courts of Chaos User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.6b) Gecko/20031208 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Gerard Samuel References: <200312240034.29237.fbsd-questions@trini0.org> In-Reply-To: <200312240034.29237.fbsd-questions@trini0.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 8bit X-Authentication-Info: Submitted using SMTP AUTH at out008.verizon.net from [68.161.96.170] at Wed, 24 Dec 2003 12:57:10 -0600 cc: questions@freebsd.org Subject: Re: Running dual CPUs X-BeenThere: freebsd-questions@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: User questions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Dec 2003 18:57:13 -0000 Gerard Samuel wrote: > I acquired a pair of Slot 1 CPUs that is supposedly a matched pair. > I've heard, that they must be of the same stepping, and Im not sure of what Im > looking for. See page 12 of: ftp://download.intel.com/design/PentiumIII/specupdt/24445349.pdf ...which discusses this issue in detail: "Mixed Steppings in DP Systems Intel Corporation fully supports mixed steppings of Pentium III processors. The following list and processor matrix describes the requirements to support mixed steppings: • Mixed steppings are only supported with processors that have identical family and model number as indicated by the CPUID instruction. [ ... ] • In dual processor systems, the processor with the lowest feature-set, as determined by the CPUID Feature Bytes, must be the Bootstrap Processor (BSP). In the event of a tie in feature-set, the tie should be resolved by selecting the BSP as the processor with the lowest stepping as determined by the CPUID instruction. In the following processor matrix a number indicates that a known issue has been identified as listed in the table following the matrix. A dual processor system using mixed processor steppings must assure that errata are addressed appropriately for each processor." ...and then provides twenty pages worth of charts, notes, and whatnot. :-) [ If you get a chance, try to upgrade to Tualatin P3's, with the full-speed L2 cache and SSE. ] -- -Chuck