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Date:      Fri, 06 Feb 2015 13:23:34 -0500
From:      John Baldwin <jhb@freebsd.org>
To:        src-committers@freebsd.org
Cc:        svn-src-head@freebsd.org, svn-src-all@freebsd.org
Subject:   Re: svn commit: r278325 - in head/sys: amd64/amd64 i386/i386 x86/x86
Message-ID:  <3474953.fuLVXbEtbd@ralph.baldwin.cx>
In-Reply-To: <201502061820.t16IK0w7052945@svn.freebsd.org>
References:  <201502061820.t16IK0w7052945@svn.freebsd.org>

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On Friday, February 06, 2015 06:20:00 PM John Baldwin wrote:
> Author: jhb
> Date: Fri Feb  6 18:19:59 2015
> New Revision: 278325
> URL: https://svnweb.freebsd.org/changeset/base/278325
> 
> Log:
>   Revert the IPI startup sequence to match what is described in the
>   Intel Multiprocessor Specification v1.4.  The Intel SDM claims that
>   the INIT IPIs here are invalid, but other systems follow the MP
>   spec instead.

All of the breakage here is my fault.  The original IPIs present in FreeBSD 3 
and 4 followed the MP spec.  However, the Intel SDM claims that some of the 
IPIs involved are invalid on modern hardware and doesn't use level trigger or 
a de-assert INIT in the reference code in the SDM.  The SDM is what led me to 
change the initial INIT to edge trigger.

One SDMism I did adopt here was to always set the interrupt asserted bit 
except in the special case of the INIT de-assert.

-- 
John Baldwin



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