From owner-svn-src-head@FreeBSD.ORG Sun Jan 2 15:01:04 2011 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 65B371065672; Sun, 2 Jan 2011 15:01:04 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 31E838FC08; Sun, 2 Jan 2011 15:01:04 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p02F14im049346; Sun, 2 Jan 2011 15:01:04 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p02F14xV049344; Sun, 2 Jan 2011 15:01:04 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <201101021501.p02F14xV049344@svn.freebsd.org> From: Marius Strobl Date: Sun, 2 Jan 2011 15:01:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r216891 - head/sys/sparc64/sparc64 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 02 Jan 2011 15:01:04 -0000 Author: marius Date: Sun Jan 2 15:01:03 2011 New Revision: 216891 URL: http://svn.freebsd.org/changeset/base/216891 Log: Extend the section in which interrupts are disabled in the TLB demap functions, otherwise if we get preempted after checking whether a certain pmap is active on the current CPU but before disabling interrupts we might operate on an outdated state as the pmap might have been deactivated in the meantime. As the same issue may arises when the TLB demap function is interrupted by a TLB demap IPI, just entering a critical section before the check isn't sufficient so we have to fully disable interrupts instead. MFC after: 3 days Modified: head/sys/sparc64/sparc64/tlb.c Modified: head/sys/sparc64/sparc64/tlb.c ============================================================================== --- head/sys/sparc64/sparc64/tlb.c Sun Jan 2 13:31:10 2011 (r216890) +++ head/sys/sparc64/sparc64/tlb.c Sun Jan 2 15:01:03 2011 (r216891) @@ -80,15 +80,15 @@ tlb_context_demap(struct pmap *pm) */ PMAP_STATS_INC(tlb_ncontext_demap); cookie = ipi_tlb_context_demap(pm); + s = intr_disable(); if (pm->pm_active & PCPU_GET(cpumask)) { KASSERT(pm->pm_context[curcpu] != -1, ("tlb_context_demap: inactive pmap?")); - s = intr_disable(); stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_DMMU_DEMAP, 0); stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_IMMU_DEMAP, 0); flush(KERNBASE); - intr_restore(s); } + intr_restore(s); ipi_wait(cookie); } @@ -101,6 +101,7 @@ tlb_page_demap(struct pmap *pm, vm_offse PMAP_STATS_INC(tlb_npage_demap); cookie = ipi_tlb_page_demap(pm, va); + s = intr_disable(); if (pm->pm_active & PCPU_GET(cpumask)) { KASSERT(pm->pm_context[curcpu] != -1, ("tlb_page_demap: inactive pmap?")); @@ -109,12 +110,11 @@ tlb_page_demap(struct pmap *pm, vm_offse else flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE; - s = intr_disable(); stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0); stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0); flush(KERNBASE); - intr_restore(s); } + intr_restore(s); ipi_wait(cookie); } @@ -128,6 +128,7 @@ tlb_range_demap(struct pmap *pm, vm_offs PMAP_STATS_INC(tlb_nrange_demap); cookie = ipi_tlb_range_demap(pm, start, end); + s = intr_disable(); if (pm->pm_active & PCPU_GET(cpumask)) { KASSERT(pm->pm_context[curcpu] != -1, ("tlb_range_demap: inactive pmap?")); @@ -136,13 +137,12 @@ tlb_range_demap(struct pmap *pm, vm_offs else flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE; - s = intr_disable(); for (va = start; va < end; va += PAGE_SIZE) { stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0); stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0); flush(KERNBASE); } - intr_restore(s); } + intr_restore(s); ipi_wait(cookie); }