From owner-svn-src-head@FreeBSD.ORG Sun Dec 1 19:59:37 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id F1C6EC3F; Sun, 1 Dec 2013 19:59:36 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id C50B317ED; Sun, 1 Dec 2013 19:59:36 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rB1Jxa0V083094; Sun, 1 Dec 2013 19:59:36 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rB1JxaCJ083093; Sun, 1 Dec 2013 19:59:36 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201312011959.rB1JxaCJ083093@svn.freebsd.org> From: Nathan Whitehorn Date: Sun, 1 Dec 2013 19:59:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r258811 - head/sys/powerpc/ofw X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 01 Dec 2013 19:59:37 -0000 Author: nwhitehorn Date: Sun Dec 1 19:59:36 2013 New Revision: 258811 URL: http://svnweb.freebsd.org/changeset/base/258811 Log: Revert last few revisions; apologies for the noise. There are very rare, broken systems that require SPRG state to be preserved. Modified: head/sys/powerpc/ofw/ofw_machdep.c Modified: head/sys/powerpc/ofw/ofw_machdep.c ============================================================================== --- head/sys/powerpc/ofw/ofw_machdep.c Sun Dec 1 19:56:30 2013 (r258810) +++ head/sys/powerpc/ofw/ofw_machdep.c Sun Dec 1 19:59:36 2013 (r258811) @@ -90,6 +90,49 @@ ofw_restore_trap_vec(char *restore_trap_ bcopy(restore_trap_vec, (void *)EXC_RST, EXC_LAST - EXC_RST); __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD); } + +/* + * Saved SPRG0-3 from OpenFirmware. Will be restored prior to the callback. + */ +register_t ofw_sprg0_save; + +static __inline void +ofw_sprg_prepare(void) +{ + if (ofw_real_mode) + return; + + /* + * Assume that interrupt are disabled at this point, or + * SPRG1-3 could be trashed + */ + __asm __volatile("mfsprg0 %0\n\t" + "mtsprg0 %1\n\t" + "mtsprg1 %2\n\t" + "mtsprg2 %3\n\t" + "mtsprg3 %4\n\t" + : "=&r"(ofw_sprg0_save) + : "r"(ofmsr[1]), + "r"(ofmsr[2]), + "r"(ofmsr[3]), + "r"(ofmsr[4])); +} + +static __inline void +ofw_sprg_restore(void) +{ + if (ofw_real_mode) + return; + + /* + * Note that SPRG1-3 contents are irrelevant. They are scratch + * registers used in the early portion of trap handling when + * interrupts are disabled. + * + * PCPU data cannot be used until this routine is called ! + */ + __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); +} #endif static int @@ -287,10 +330,13 @@ openfirmware_core(void *args) /* * Turn off exceptions - we really don't want to end up - * anywhere in the kernel while in OF state. + * anywhere unexpected with PCPU set to something strange + * or the stack pointer wrong. */ oldmsr = intr_disable(); + ofw_sprg_prepare(); + /* Save trap vectors */ ofw_save_trap_vec(save_trap_of); @@ -312,6 +358,8 @@ openfirmware_core(void *args) /* Restore trap vecotrs */ ofw_restore_trap_vec(save_trap_of); + ofw_sprg_restore(); + intr_restore(oldmsr); return (result);