From owner-svn-src-all@FreeBSD.ORG Wed Sep 3 23:08:48 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id D3BBC7D0; Wed, 3 Sep 2014 23:08:48 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BF62D1483; Wed, 3 Sep 2014 23:08:48 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s83N8mHU022830; Wed, 3 Sep 2014 23:08:48 GMT (envelope-from gavin@FreeBSD.org) Received: (from gavin@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s83N8mab022829; Wed, 3 Sep 2014 23:08:48 GMT (envelope-from gavin@FreeBSD.org) Message-Id: <201409032308.s83N8mab022829@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: gavin set sender to gavin@FreeBSD.org using -f From: Gavin Atkinson Date: Wed, 3 Sep 2014 23:08:48 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r271061 - stable/9/sys/dev/pccbb X-SVN-Group: stable-9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Sep 2014 23:08:49 -0000 Author: gavin Date: Wed Sep 3 23:08:48 2014 New Revision: 271061 URL: http://svnweb.freebsd.org/changeset/base/271061 Log: Merge r269488 from head: For reasons which are not clear, r254263 broke some PCMCIA and CardBus bridges in strange ways, either rendering them unable to detect insertion and removal events, or possibly unable to read from the device behind the bridge. This fixes at least one laptop, a Toshiba Tecra M5 with a Texas Instruments PCxx12 (d=0x8039 v=0c104c) bridge. The very similar Tecra M9 has the same bridge, but worked fine without this change. The bridge chip has no I/O port BAR, and there is nothing in the spec to suggest I/O decoding should be enabled; however enabling it fixes the issue. Add an XXX comment to this effect. Discussed with: jhb, imp Modified: stable/9/sys/dev/pccbb/pccbb_pci.c Directory Properties: stable/9/sys/ (props changed) stable/9/sys/dev/ (props changed) Modified: stable/9/sys/dev/pccbb/pccbb_pci.c ============================================================================== --- stable/9/sys/dev/pccbb/pccbb_pci.c Wed Sep 3 23:08:21 2014 (r271060) +++ stable/9/sys/dev/pccbb/pccbb_pci.c Wed Sep 3 23:08:48 2014 (r271061) @@ -472,6 +472,8 @@ cbb_chipinit(struct cbb_softc *sc) /* Enable memory access */ pci_enable_busmaster(sc->dev); + /* XXX: This should not be necessary, but some chipsets require it */ + PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND, | PCIM_CMD_PORTEN, 2); /* disable Legacy IO */ switch (sc->chipset) {