Date: Tue, 12 Jun 2012 23:45:08 +0300 From: Konstantin Belousov <kostikbel@gmail.com> To: Ian Lepore <freebsd@damnhippie.dyndns.org> Cc: Wojciech Puchar <wojtek@wojtek.tensor.gdynia.pl>, freebsd-hackers@freebsd.org Subject: Re: wired memory - again! Message-ID: <20120612204508.GP2337@deviant.kiev.zoral.com.ua> In-Reply-To: <1339512694.36051.362.camel@revolution.hippie.lan> References: <alpine.BSF.2.00.1206090920030.84632@wojtek.tensor.gdynia.pl> <1339259223.36051.328.camel@revolution.hippie.lan> <20120609165217.GO85127@deviant.kiev.zoral.com.ua> <alpine.BSF.2.00.1206092244550.9248@wojtek.tensor.gdynia.pl> <1339512694.36051.362.camel@revolution.hippie.lan>
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--e2bLSPRkEYxxSNev Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jun 12, 2012 at 08:51:34AM -0600, Ian Lepore wrote: > On Sat, 2012-06-09 at 22:45 +0200, Wojciech Puchar wrote: > > > > > > First, all memory allocated by UMA and consequently malloc(9) is > > > wired. In other words, almost all memory used by kernel is accounted > > > as wired. > > > > > yes i understand this. still i found no way how to find out what alloca= ted=20 > > that much. > >=20 > >=20 > > > Second, the buffer cache wires the pages which are inserted into VMIO > > > buffers. So your observation is basically right, cached buffers means > >=20 > > what are exactly "VMIO" buffers. i understand that page must be wired W= HEN=20 > > doing I/O. > > But i have too much wired memory even when doing no I/O at all. >=20 > I agree, this is The Big Question for me. Why does the system keep > wired writable mappings of the buffers in kva after the IO operations > are completed? =20 Read about buffer cache, e.g. in the Design and Implementation of the FreeBSD OS book. >=20 > If it did not do so, it would fix the instruction-cache-disabled bug > that kills performance on VIVT cache architectures (arm and mips) and it > would reduce the amount of wired memory (that apparently doesn't need to > be wired, unless I've missed the implications of a previous reply in > this thread). I have no idea what is the bug you are talking about. If my guess is right, and it specifically references unability of some processors to correctly handle several mappings of the same physical page into different virtual addresses due to cache tagging using virtual address instead of physical, then this is a hardware bug, not software. AFAIR, at least HP PA and MIPS have different instantiation of this problem. Our kernel uses multi-mapping quite often, and buffers is only one example. Also, why do you think that the pages entered into buffers shall not be wired, it is completely beyond my understanding. --e2bLSPRkEYxxSNev Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (FreeBSD) iEYEARECAAYFAk/XqlQACgkQC3+MBN1Mb4hfmQCgw2WXceltqeFrbY82uc618BzJ dtMAoPOXqmUsBncvW6A+QzJKX/bDOo6I =0UY6 -----END PGP SIGNATURE----- --e2bLSPRkEYxxSNev--
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