From owner-freebsd-amd64@FreeBSD.ORG Mon Jul 9 15:38:21 2012 Return-Path: Delivered-To: amd64@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4FB831065672; Mon, 9 Jul 2012 15:38:21 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (bigknife-pt.tunnel.tserv9.chi1.ipv6.he.net [IPv6:2001:470:1f10:75::2]) by mx1.freebsd.org (Postfix) with ESMTP id 261DF8FC0C; Mon, 9 Jul 2012 15:38:21 +0000 (UTC) Received: from jhbbsd.localnet (unknown [209.249.190.124]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 85394B9B0; Mon, 9 Jul 2012 11:38:20 -0400 (EDT) From: John Baldwin To: freebsd-current@freebsd.org Date: Mon, 9 Jul 2012 11:24:52 -0400 User-Agent: KMail/1.13.5 (FreeBSD/8.2-CBSD-20110714-p17; KDE/4.5.5; amd64; ; ) References: <20120708150225.GA2338@deviant.kiev.zoral.com.ua> In-Reply-To: <20120708150225.GA2338@deviant.kiev.zoral.com.ua> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Message-Id: <201207091124.52044.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Mon, 09 Jul 2012 11:38:20 -0400 (EDT) Cc: amd64@freebsd.org Subject: Re: XSAVEOPT X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Jul 2012 15:38:21 -0000 On Sunday, July 08, 2012 11:02:25 am Konstantin Belousov wrote: > Please find at > http://people.freebsd.org/~kib/misc/xsaveopt.1.patch > a patch to finally add suport for using XSAVEOPT for our amd64 context > switch code. See Intel SDM for description of the XSAVEOPT instruction. > > Summary is that the instruction allows to not write parts of the FPU > state which was not touched by the thread. Context switch then would > write less to the PCB when thread is moved out from CPU. This is mainly > to facilitate the ever-growing size of the FPU register file, in > particular, AVX/YMM registers. Normal applications do not touch YMM, so > saving them on each context switch if FPU was used is waste. > > Main complication is that any consumer of the ucontext_t still expect to > see fully populated machine state, including the extended states which were > not saved. Since CPU only avoids save when corresponding state is pristine, > we can use the copy of initial state. CPUID provides an enumerator that > allows OS to easily pick up neccesary area and copy over. > > I tried hard, but was unable to measure any statistically significant > difference in the context switch times between XSAVE and XSAVEOPT using > lmbench lat_ctx, on Core i7 2600K. Hmm, I thought one of the ideas of xsaveopt was to let you just always execute it during a context switch and dispense with the need for using the CR0_TS flag at all? Maybe that isn't true though. It would seem rather silly to switch out the state if you don't need to (when preempting a thread that uses the FPU to run a thread that doesn't and then switching back for example). -- John Baldwin