From owner-freebsd-arm@freebsd.org Wed Oct 19 22:40:40 2016 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id BCE92C19367 for ; Wed, 19 Oct 2016 22:40:40 +0000 (UTC) (envelope-from wlosh@bsdimp.com) Received: from mail-it0-x22c.google.com (mail-it0-x22c.google.com [IPv6:2607:f8b0:4001:c0b::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 860A3B5C for ; Wed, 19 Oct 2016 22:40:40 +0000 (UTC) (envelope-from wlosh@bsdimp.com) Received: by mail-it0-x22c.google.com with SMTP id m138so50129972itm.0 for ; Wed, 19 Oct 2016 15:40:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=RBFiNo2G84gh3Oxg280p6nBiGfyo25lSS2JM5U2jBUk=; b=poSkVXV95XH3SxtfMGVueYR8NLwihQzgMm9YjOxlCp8RQFAyBEtfgMipQwu7q4bOLV bzKcodbnV/nXr03WGM8UZ95FpjItd19Qrm4I8KvVuRiJqxsL+MoLTnkkD3C6OM2FLbtL /Pdssy7gnEr/4UfmUJel3INXxh3Pr0c1zekuBZE0a+/GhP0WKn0c+GJrdSVPR3MaD5OW gR5Uw4anQQuNASmCd0mq4maBfmgsCdN7PuBFngjEJSPq3P1TumY35AUMW74kLrvFTh6B FH+uZM88kiebCLTYH5st0wvBPxVgCzOMNa/wlo/rOKCSgyK6DsbbbjuyeCxjeYNuadL0 jGyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=RBFiNo2G84gh3Oxg280p6nBiGfyo25lSS2JM5U2jBUk=; b=KxdFcC2+45wocnAcANJOoTKFbdboiEGA9FP4umItLGNuRT/LFIHHgnLbF756vQjngA 1K0oMxcKOuTvwCM+vIWEwPVAPPpNfL98TQON1xh3UIjZRVmOvmW1BRkmRgH2EqKahHV8 qodhvrlQB7Sb6uu+cE/gz4wcjGc14Na2OpBLjbWlVkPa51oQ8iFtLrQFAljKc/aSWqOP Xx2pMIwKI5a2h24TY2EtX8e5OcPClSztV0PwBXAyui6nr567xsfGPcHK1XzFOu76uRlJ COsuGv0ulRhZxtMDcoSOz/mTzXjxNda9kYSaAht9lriDTpdS+WNuJR/DQkDXVZY3cdmJ kM4g== X-Gm-Message-State: AA6/9RmuAA2oUVATidwXhDO6WfXnE8lJFpHeFmDzv+dUYZuXOkhB/q2PXFxH6XD82MU/tnRvxYY5ktKd92eOEg== X-Received: by 10.36.43.82 with SMTP id h79mr9706973ita.60.1476916839875; Wed, 19 Oct 2016 15:40:39 -0700 (PDT) MIME-Version: 1.0 Sender: wlosh@bsdimp.com Received: by 10.79.77.85 with HTTP; Wed, 19 Oct 2016 15:40:39 -0700 (PDT) X-Originating-IP: [50.253.99.174] In-Reply-To: <201610191833.u9JIXlb1037363@pdx.rh.CN85.dnsmgr.net> References: <20161019112224.GA10536@night.db.net> <201610191833.u9JIXlb1037363@pdx.rh.CN85.dnsmgr.net> From: Warner Losh Date: Wed, 19 Oct 2016 16:40:39 -0600 X-Google-Sender-Auth: R8tiqpG79rjPZ5HGeteoOA8C2TM Message-ID: Subject: Re: Raspberry Pi 3 support To: "Rodney W. Grimes" Cc: Diane Bruce , "freebsd-arm@freebsd.org" , Ross Alexander Content-Type: text/plain; charset=UTF-8 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Oct 2016 22:40:40 -0000 On Wed, Oct 19, 2016 at 12:33 PM, Rodney W. Grimes wrote: >> On Wed, Oct 19, 2016 at 01:46:20AM -0600, Warner Losh wrote: >> ... >> > I've updated the nanobsd build. >> > >> > Is the u-boot-rpi3 port different from the other u-boot ports in >> > requiring someone to snag firmware in addition to u-boot? Will that be >> > fixed? Or should I go ahead and fix it when I get to rpi3 in my uboot >> > cleanup? >> >> I looked at how the rpi2 u boot port did it. crochet (or whoever) is >> responsible for building a dtb from a source dts we have. So for now >> the rpi3 port does not provide the dtb files but will provide the broadcom >> binary (as the RPI2 port does). Really this is one place where the >> RPi2 and RPi3 ports could share easily as the firmware should be the same. >> We need to chat about this further ;) > > It would be very nice to support both 32 bit and 64 bit worlds on the > RPI3. I am not sure if this can be done in one version of uboot, or > if it would require two, as IIRC it is the binary blob running in the > GPU that sets the CPU up for 32 or 64 bit. Can't be done with one u-boot image. Could be done with two in one FAT. However, we don't even support SMP yet on rpi3 and we've barely grown support in the tree for it. This is a great idea, but a bit premature I think. Warner