From owner-svn-src-all@FreeBSD.ORG Thu May 7 16:56:21 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 19E809BA; Thu, 7 May 2015 16:56:21 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 085221FEE; Thu, 7 May 2015 16:56:21 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t47GuKAq030768; Thu, 7 May 2015 16:56:20 GMT (envelope-from emaste@FreeBSD.org) Received: (from emaste@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t47GuK4A030767; Thu, 7 May 2015 16:56:20 GMT (envelope-from emaste@FreeBSD.org) Message-Id: <201505071656.t47GuK4A030767@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: emaste set sender to emaste@FreeBSD.org using -f From: Ed Maste Date: Thu, 7 May 2015 16:56:20 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r282586 - head/sys/arm/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 May 2015 16:56:21 -0000 Author: emaste Date: Thu May 7 16:56:20 2015 New Revision: 282586 URL: https://svnweb.freebsd.org/changeset/base/282586 Log: Correct PL310_POWER_CTRL offset Offet for the power control register was specified incorrectly (it had the same value as the prefetch control register.) This change corrects the offset value to 0xF80, per the ARM PL310 documentation. Submitted by: Steve Kiernan Obtained from: Juniper Networks, Inc. Modified: head/sys/arm/include/pl310.h Modified: head/sys/arm/include/pl310.h ============================================================================== --- head/sys/arm/include/pl310.h Thu May 7 15:31:21 2015 (r282585) +++ head/sys/arm/include/pl310.h Thu May 7 16:56:20 2015 (r282586) @@ -133,7 +133,7 @@ #define PREFETCH_CTRL_DATA_PREFETCH (1 << 28) #define PREFETCH_CTRL_INSTR_PREFETCH (1 << 29) #define PREFETCH_CTRL_DL (1 << 30) -#define PL310_POWER_CTRL 0xF60 +#define PL310_POWER_CTRL 0xF80 #define POWER_CTRL_ENABLE_GATING (1 << 0) #define POWER_CTRL_ENABLE_STANDBY (1 << 1)