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Date:      Sun, 13 Oct 2002 11:00:08 -0700
From:      Terry Lambert <tlambert2@mindspring.com>
To:        "M. Warner Losh" <imp@bsdimp.com>
Cc:        ticso@cicely.de, hch@infradead.org, wes@softweyr.com, dillon@apollo.backplane.com, vova@sw.ru, nate@root.org, arch@FreeBSD.org
Subject:   Re: Database indexes and ram
Message-ID:  <3DA9B4A8.194A02FC@mindspring.com>
References:  <20021012.150616.129769790.imp@bsdimp.com> <20021013103538.GG17920@cicely8.cicely.de> <3DA954CF.98B0891A@mindspring.com> <20021013.060851.113437955.imp@bsdimp.com>

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"M. Warner Losh" wrote:
> In message: <3DA954CF.98B0891A@mindspring.com>
>             Terry Lambert <tlambert2@mindspring.com> writes:
> : In most cases, the DMA gets put directly into memory mapped by the
> : VM of the kernel (the KVA).
> 
> Actually, in most cases on i386 the memory gets DMAd to a phyiscal
> address, which is why there is a 4G limit in the hardware.  Since it
> is a phyiscal address, knowing VM tricks I don't think is relevant.
> PAE is basically a vm trick.

You've taken the argument out of context.  The argument is about:

1)	The interrupt handler for the completed DMA

2)	The fact that most data which is DMA'ed ends up being shared
	between multiple processes

3)	The fact that the VM and buffer cache are unified, so that
	even if you wanted to do explicit coherency between multiple
	copies of DMA'ed data, you would not be able to, unless they
	occurred into a region which was not replicated, which means
	one which was shared, which means "in the KVA", which means
	"not in the bank selected PAE/PSE-36 window".

-- Terry

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