Date: Tue, 27 Dec 2022 10:26:29 -0800 From: Mark Millard <marklmi@yahoo.com> To: freebsd-arm <freebsd-arm@freebsd.org> Subject: RPi4B's: 13.* boot "'failed to allocate bus number" message vs. main's [so: 14's] lack of such, also related Device Tree content Message-ID: <2837F65C-9812-4A78-855E-7B6FAB8936B8@yahoo.com> References: <2837F65C-9812-4A78-855E-7B6FAB8936B8.ref@yahoo.com>
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# uname -apKU
FreeBSD generic 13.1-STABLE FreeBSD 13.1-STABLE #0 =
stable/13-n253304-461210143fbb: Fri Dec 23 23:25:49 UTC 2022 =
root@releng3.nyi.freebsd.org:/usr/obj/usr/src/arm64.aarch64/sys/GENERIC =
arm64 aarch64 1301510 1301510
boot -v output (to give more context):
. . .
pcib0: <BCM2838-compatible PCI-express controller> mem =
0x7d500000-0x7d50930f irq 80,81 on simplebus2
pcib0: parsing FDT for ECAM0:
pcib0: PCI addr: 0xc0000000, CPU addr: 0x600000000, Size: 0x40000000
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: PCI addr: 0x0, CPU addr: 0x0, Size: 0x0
pcib0: Bus is not cache-coherent
pcib0: hardware identifies as revision 0x304.
pcib0: note: reported link speed is 5.0 GT/s.
pci1: <PCI bus> on pcib0
pci1: domain=3D0, physical bus=3D0
found-> vendor=3D0x14e4, dev=3D0x2711, revid=3D0x00
domain=3D0, bus=3D0, slot=3D0, func=3D0
class=3D06-04-00, hdrtype=3D0x01, mfdev=3D0
cmdreg=3D0x0000, statreg=3D0x0010, cachelnsz=3D0 (dwords)
lattimer=3D0x00 (0 ns), mingnt=3D0x00 (0 ns), maxlat=3D0x00 (0 =
ns)
intpin=3Da, irq=3D0
powerspec 3 supports D0 D3 current D0
secbus=3D1, subbus=3D1
pcib1: <PCI-PCI bridge> irq 91 at device 0.0 on pci1
pcib0: rman_reserve_resource: start=3D0xc0000000, end=3D0xc00fffff, =
count=3D0x100000
pcib1: domain 0
pcib1: secondary bus 1
pcib1: subordinate bus 1
pcib1: memory decode 0xc0000000-0xc00fffff
pci2: <PCI bus> on pcib1
pcib1: allocated bus range (1-1) for rid 0 of pci2
pci2: domain=3D0, physical bus=3D1
found-> vendor=3D0x1106, dev=3D0x3483, revid=3D0x01
domain=3D0, bus=3D1, slot=3D0, func=3D0
class=3D0c-03-30, hdrtype=3D0x00, mfdev=3D0
cmdreg=3D0x0000, statreg=3D0x0010, cachelnsz=3D0 (dwords)
lattimer=3D0x00 (0 ns), mingnt=3D0x00 (0 ns), maxlat=3D0x00 (0 =
ns)
intpin=3Da, irq=3D0
powerspec 3 supports D0 D3 current D0
MSI supports 4 messages, 64 bit
map[10]: type Memory, range 64, base 0, size 12, memory disabled
pcib1: slot 0 INTA is routed to irq 92
bcm_xhci0: <VL805 USB 3.0 controller (on the Raspberry Pi 4b)> irq 92 at =
device 0.0 on pci2
bcm_xhci0: note: xhci firmware not found.
bcm_xhci0: note: installing xhci firmware.
bcm_xhci0: note: xhci firmware detected; firmware is revision 138a1.
pcib1: allocated memory range (0xc0000000-0xc0000fff) for rid 10 of =
bcm_xhci0
bcm_xhci0: Lazy allocation of 0x1000 bytes rid 0x10 type 3 at 0xc0000000
bcm_xhci0: 32 bytes context size, 64-bit DMA
bcm_xhci0: attempting to allocate 1 MSI vectors (4 supported)
bcm_xhci0: using IRQ 93 for MSI
bcm_xhci0: MSI enabled
bcm_xhci0: (New XHCI DeviceId=3D0x34831106)
usbus0 on bcm_xhci0
bcm_xhci0: usbpf: Attached
bcm_xhci0: note: switched to 32-bit DMA.
pci0: <PCI bus> on pcib0
pci0: failed to allocate bus number
device_attach: pci0 attach returned 6
genet0: <RPi4 Gigabit Ethernet> mem 0x7d580000-0x7d58ffff irq 82,83 on =
simplebus2
. . .
But this goes back to releng/13.0 (and, likely, beyond),
including in main after stable/13 .
Higlighting what is different vs. main . . .
First note pci1: vs. pci0: (and main's "OFW") in . . .
pcib0: Bus is not cache-coherent
pcib0: hardware identifies as revision 0x304.
pcib0: note: reported link speed is 5.0 GT/s.
pci1: <PCI bus> on pcib0
pci1: domain=3D0, physical bus=3D0
vs.
pcib0: Bus is not cache-coherent
pcib0: hardware identifies as revision 0x304.
pcib0: note: reported link speed is 5.0 GT/s.
pci0: <OFW PCI bus> on pcib0
pci0: domain=3D0, physical bus=3D0
Again, later . . .
pcib1: <PCI-PCI bridge> irq 91 at device 0.0 on pci1
vs.
pcib1: <PCI-PCI bridge> irq 91 at device 0.0 on pci0
Note pci2 vs pci1 later (and, again main has "OFW") . . .
pci2: <PCI bus> on pcib1
pcib1: allocated bus range (1-1) for rid 0 of pci2
pci2: domain=3D0, physical bus=3D1
vs.
pci1: <OFW PCI bus> on pcib1
pcib1: allocated bus range (1-1) for rid 0 of pci1
pci1: domain=3D0, physical bus=3D1
Again, later . . .
bcm_xhci0: <VL805 USB 3.0 controller (on the Raspberry Pi 4b)> irq 92 at =
device 0.0 on pci2
vs.
bcm_xhci0: <VL805 USB 3.0 controller (on the Raspberry Pi 4b)> irq 92 at =
device 0.0 on pci1
Finally the error report vs. not . . ..
bcm_xhci0: note: switched to 32-bit DMA.
pci0: <PCI bus> on pcib0
pci0: failed to allocate bus number
device_attach: pci0 attach returned 6
genet0: <RPi4 Gigabit Ethernet> mem 0x7d580000-0x7d58ffff irq 82,83 on =
simplebus2
vs.
bcm_xhci0: note: switched to 32-bit DMA.
genet0: <RPi4 Gigabit Ethernet> mem 0x7d580000-0x7d58ffff irq 82,83 on =
simplebus2
The rest of main's output text for the block I first quoted
is the same.
An FYI about later RPi* firmware updates and the .dts/.dtb
content that is related (two separate changes). . .
=
https://github.com/raspberrypi/linux/commit/13dbc954b3c9a9de0ad5b7279e8d3b=
708d31068b
reports (2021-Oct-12):
QUOTE
ARM: dts: bcm2711-rpi-4-b: Fix pcie0's unit address formatting
dtbs_check currently complains that:
arch/arm/boot/dts/bcm2711-rpi-4-b.dts:220.10-231.4: Warning
(pci_device_reg): /scb/pcie@7d500000/pci@1,0: PCI unit address format
error, expected "0,0"
Unsurprisingly pci@0,0 is the right address, as illustrated by its reg
property:
&pcie0 {
pci@0,0 {
/*
* As defined in the IEEE Std 1275-1994 document,
* reg is a five-cell address encoded as (phys.hi
* phys.mid phys.lo size.hi size.lo). phys.hi
* should contain the device's BDF as 0b00000000
* bbbbbbbb dddddfff 00000000. The other cells
* should be zero.
*/
reg =3D <0 0 0 0 0>;
};
};
The device is clearly 0. So fix it.
Also add a missing 'device_type =3D "pci"'.
Fixes: 258f92d ("ARM: dts: bcm2711: Add reset controller to xHCI node")
Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: =
https://lore.kernel.org/r/20210831125843.1233488-1-nsaenzju@redhat.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
END QUOTE
The diff shows (leading whitespace possibly
not preserved):
&pcie0 {
- pci@1,0 {
+ pci@0,0 {
+ device_type =3D "pci";
#address-cells =3D <3>;
#size-cells =3D <2>;
ranges;
There is also (same day):
=
https://github.com/raspberrypi/linux/commit/3f32472854614d6f53b09b4812372d=
ba9fc5c7de
that reports:
QUOTE
ARM: dts: bcm2711-rpi-4-b: Fix usb's unit address
The unit address is supposed to represent '<device>,<function>'. Which
are both 0 for RPi4b's XHCI controller. On top of that although
OpenFirmware states bus number goes in the high part of the last reg
parameter, FDT doesn't seem to care for it[1], so remove it.
[1] =
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210830103909=
.323356-1-nsaenzju@redhat.com/#24414633
Fixes: 258f92d ("ARM: dts: bcm2711: Add reset controller to xHCI node")
Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: =
https://lore.kernel.org/r/20210831125843.1233488-2-nsaenzju@redhat.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
END QUOTE
The diff shows (leading whitespace possibly
not preserved):
reg =3D <0 0 0 0 0>;
=20
- usb@1,0 {
- reg =3D <0x10000 0 0 0 0>;
+ usb@0,0 {
+ reg =3D <0 0 0 0 0>;
resets =3D <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
};
};
=3D=3D=3D
Mark Millard
marklmi at yahoo.com
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