From owner-svn-src-head@freebsd.org Sat Oct 7 20:04:20 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 9F250E40FEA; Sat, 7 Oct 2017 20:04:20 +0000 (UTC) (envelope-from truckman@FreeBSD.org) Received: from gw.catspoiler.org (unknown [IPv6:2602:304:b010:ef20::f2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "gw.catspoiler.org", Issuer "gw.catspoiler.org" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 206556AFE7; Sat, 7 Oct 2017 20:04:19 +0000 (UTC) (envelope-from truckman@FreeBSD.org) Received: from FreeBSD.org (mousie.catspoiler.org [192.168.101.2]) by gw.catspoiler.org (8.15.2/8.15.2) with ESMTP id v97K49xE062415; Sat, 7 Oct 2017 13:04:13 -0700 (PDT) (envelope-from truckman@FreeBSD.org) Message-Id: <201710072004.v97K49xE062415@gw.catspoiler.org> Date: Sat, 7 Oct 2017 13:04:09 -0700 (PDT) From: Don Lewis Subject: Re: svn commit: r324313 - head/sys/amd64/amd64 To: kib@FreeBSD.org cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org In-Reply-To: <201710051250.v95Co31e048931@repo.freebsd.org> MIME-Version: 1.0 Content-Type: TEXT/plain; charset=us-ascii X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 07 Oct 2017 20:04:20 -0000 On 5 Oct, Konstantin Belousov wrote: > Author: kib > Date: Thu Oct 5 12:50:03 2017 > New Revision: 324313 > URL: https://svnweb.freebsd.org/changeset/base/324313 > > Log: > Avoid a race betweem freeing LDT and context switches. > > cpu_switch.S uses curproc->p_md.md_ldt value as the flag indicating > presence of the process LDT. The flag is checked and then ldt segment > descriptor is copied into the CPU' GDT slot. > > Disallow context switches around clearing of the curproc LDT state by > performing the cleanup in critical section. Ensure that the md_ldt > flag is cleared before md_ldt_sd descriptor content is destroyed by > inserting fence between the operations. > > We depend on the x86 memory model strong ordering guarantees, in > particular, that cpu_switch.S observes the writes to md_ldt and > md_ldt_sd in the expected order. I don't know which of this series of commits is responsible, but I think that it fixed the build of lang/ghc on Ryzen. https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=221029#c102