From owner-svn-src-all@freebsd.org Fri Nov 15 03:37:50 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 83FAD1BB297; Fri, 15 Nov 2019 03:37:50 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 47DkZQ2ghrz4Xxt; Fri, 15 Nov 2019 03:37:50 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 27413AC40; Fri, 15 Nov 2019 03:37:50 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id xAF3boIV050908; Fri, 15 Nov 2019 03:37:50 GMT (envelope-from mhorne@FreeBSD.org) Received: (from mhorne@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id xAF3bnq0050906; Fri, 15 Nov 2019 03:37:49 GMT (envelope-from mhorne@FreeBSD.org) Message-Id: <201911150337.xAF3bnq0050906@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mhorne set sender to mhorne@FreeBSD.org using -f From: Mitchell Horne Date: Fri, 15 Nov 2019 03:37:49 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r354721 - head/sys/riscv/include X-SVN-Group: head X-SVN-Commit-Author: mhorne X-SVN-Commit-Paths: head/sys/riscv/include X-SVN-Commit-Revision: 354721 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Nov 2019 03:37:50 -0000 Author: mhorne Date: Fri Nov 15 03:37:49 2019 New Revision: 354721 URL: https://svnweb.freebsd.org/changeset/base/354721 Log: Add missing files from r354720 MFC with: r354720 Differential Revision: https://reviews.freebsd.org/D22326 Modified: head/sys/riscv/include/md_var.h head/sys/riscv/include/sbi.h Modified: head/sys/riscv/include/md_var.h ============================================================================== --- head/sys/riscv/include/md_var.h Fri Nov 15 03:34:27 2019 (r354720) +++ head/sys/riscv/include/md_var.h Fri Nov 15 03:37:49 2019 (r354721) @@ -39,6 +39,9 @@ extern int szsigcode; extern uint64_t *vm_page_dump; extern int vm_page_dump_size; extern u_long elf_hwcap; +extern register_t mvendorid; +extern register_t marchid; +extern register_t mimpid; struct dumperinfo; Modified: head/sys/riscv/include/sbi.h ============================================================================== --- head/sys/riscv/include/sbi.h Fri Nov 15 03:34:27 2019 (r354720) +++ head/sys/riscv/include/sbi.h Fri Nov 15 03:37:49 2019 (r354721) @@ -1,6 +1,7 @@ /*- * Copyright (c) 2016-2017 Ruslan Bukin * All rights reserved. + * Copyright (c) 2019 Mitchell Horne * * Portions of this software were developed by SRI International and the * University of Cambridge Computer Laboratory under DARPA/AFRL contract @@ -37,6 +38,35 @@ #ifndef _MACHINE_SBI_H_ #define _MACHINE_SBI_H_ +/* SBI Specification Version */ +#define SBI_SPEC_VERS_MAJOR_OFFSET 24 +#define SBI_SPEC_VERS_MAJOR_MASK (0x7F << SBI_SPEC_VERS_MAJOR_OFFSET) +#define SBI_SPEC_VERS_MINOR_OFFSET 0 +#define SBI_SPEC_VERS_MINOR_MASK (0xFFFFFF << SBI_SPEC_VERS_MINOR_OFFSET) + +/* SBI Implementation IDs */ +#define SBI_IMPL_ID_BBL 0 +#define SBI_IMPL_ID_OPENSBI 1 + +/* SBI Error Codes */ +#define SBI_SUCCESS 0 +#define SBI_ERR_FAILURE -1 +#define SBI_ERR_NOT_SUPPORTED -2 +#define SBI_ERR_INVALID_PARAM -3 +#define SBI_ERR_DENIED -4 +#define SBI_ERR_INVALID_ADDRESS -5 + +/* SBI Base Extension */ +#define SBI_EXT_ID_BASE 0x10 +#define SBI_BASE_GET_SPEC_VERSION 0 +#define SBI_BASE_GET_IMPL_ID 1 +#define SBI_BASE_GET_IMPL_VERSION 2 +#define SBI_BASE_PROBE_EXTENSION 3 +#define SBI_BASE_GET_MVENDORID 4 +#define SBI_BASE_GET_MARCHID 5 +#define SBI_BASE_GET_MIMPID 6 + +/* Legacy Extensions */ #define SBI_SET_TIMER 0 #define SBI_CONSOLE_PUTCHAR 1 #define SBI_CONSOLE_GETCHAR 2 @@ -55,13 +85,20 @@ /* * Documentation available at - * https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md + * https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc */ -static __inline uint64_t +struct sbi_ret { + long error; + long value; +}; + +static __inline struct sbi_ret sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3) { + struct sbi_ret ret; + register uintptr_t a0 __asm ("a0") = (uintptr_t)(arg0); register uintptr_t a1 __asm ("a1") = (uintptr_t)(arg1); register uintptr_t a2 __asm ("a2") = (uintptr_t)(arg2); @@ -71,13 +108,27 @@ sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, __asm __volatile( \ "ecall" \ - :"+r"(a0) \ - :"r"(a1), "r"(a2), "r"(a3), "r"(a6), "r"(a7) \ + :"+r"(a0), "+r"(a1) \ + :"r"(a2), "r"(a3), "r"(a6), "r"(a7) \ :"memory"); - return (a0); + ret.error = a0; + ret.value = a1; + return (ret); } +/* Base extension functions and variables. */ +extern u_long sbi_spec_version; +extern u_long sbi_impl_id; +extern u_long sbi_impl_version; + +static __inline long +sbi_probe_extension(long id) +{ + return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value); +} + +/* Legacy extension functions. */ static __inline void sbi_console_putchar(int ch) { @@ -89,7 +140,11 @@ static __inline int sbi_console_getchar(void) { - return (SBI_CALL0(SBI_CONSOLE_GETCHAR, 0)); + /* + * XXX: The "error" is returned here because legacy SBI functions + * continue to return their value in a0. + */ + return (SBI_CALL0(SBI_CONSOLE_GETCHAR, 0).error); } static __inline void @@ -145,5 +200,7 @@ sbi_remote_sfence_vma_asid(const unsigned long *hart_m (void)SBI_CALL4(SBI_REMOTE_SFENCE_VMA_ASID, 0, (uint64_t)hart_mask, start, size, asid); } + +void sbi_init(void); #endif /* !_MACHINE_SBI_H_ */