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Date:      Mon, 18 May 2009 18:37:18 +0000 (UTC)
From:      Marcel Moolenaar <marcel@FreeBSD.org>
To:        cvs-src-old@freebsd.org
Subject:   cvs commit: src/sys/amd64/amd64 machdep.c src/sys/arm/arm machdep.c src/sys/dev/md md.c src/sys/i386/i386 machdep.c src/sys/ia64/ia64 machdep.c src/sys/mips/mips machdep.c src/sys/nfs nfs_common.c src/sys/pc98/pc98 machdep.c ...
Message-ID:  <200905181837.n4IIbx8J077108@repoman.freebsd.org>

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marcel      2009-05-18 18:37:18 UTC

  FreeBSD src repository

  Modified files:
    sys/amd64/amd64      machdep.c 
    sys/arm/arm          machdep.c 
    sys/dev/md           md.c 
    sys/i386/i386        machdep.c 
    sys/ia64/ia64        machdep.c 
    sys/mips/mips        machdep.c 
    sys/nfs              nfs_common.c 
    sys/pc98/pc98        machdep.c 
    sys/powerpc/aim      machdep.c 
    sys/powerpc/booke    machdep.c 
    sys/sparc64/sparc64  machdep.c 
    sys/sun4v/sun4v      machdep.c 
    sys/sys              systm.h 
  Log:
  SVN rev 192323 on 2009-05-18 18:37:18Z by marcel
  
  Add cpu_flush_dcache() for use after non-DMA based I/O so that a
  possible future I-cache coherency operation can succeed. On ARM
  for example the L1 cache can be (is) virtually mapped, which
  means that any I/O that uses temporary mappings will not see the
  I-cache made coherent. On ia64 a similar behaviour has been
  observed. By flushing the D-cache, execution of binaries backed
  by md(4) and/or NFS work reliably.
  For Book-E (powerpc), execution over NFS exhibits SIGILL once in
  a while as well, though cpu_flush_dcache() hasn't been implemented
  yet.
  
  Doing an explicit D-cache flush as part of the non-DMA based I/O
  read operation eliminates the need to do it as part of the
  I-cache coherency operation itself and as such avoids pessimizing
  the DMA-based I/O read operations for which D-cache are already
  flushed/invalidated. It also allows future optimizations whereby
  the bcopy() followed by the D-cache flush can be integrated in a
  single operation, which could be implemented using on-chips DMA
  engines, by-passing the D-cache altogether.
  
  Revision  Changes    Path
  1.701     +10 -0     src/sys/amd64/amd64/machdep.c
  1.33      +12 -0     src/sys/arm/arm/machdep.c
  1.181     +6 -3      src/sys/dev/md/md.c
  1.684     +10 -0     src/sys/i386/i386/machdep.c
  1.243     +15 -0     src/sys/ia64/ia64/machdep.c
  1.13      +10 -0     src/sys/mips/mips/machdep.c
  1.120     +3 -2      src/sys/nfs/nfs_common.c
  1.411     +10 -0     src/sys/pc98/pc98/machdep.c
  1.126     +10 -0     src/sys/powerpc/aim/machdep.c
  1.16      +10 -0     src/sys/powerpc/booke/machdep.c
  1.153     +10 -0     src/sys/sparc64/sparc64/machdep.c
  1.20      +10 -0     src/sys/sun4v/sun4v/machdep.c
  1.275     +1 -0      src/sys/sys/systm.h



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