From owner-svn-src-head@freebsd.org Fri Nov 20 11:26:21 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 5E9292C65D0; Fri, 20 Nov 2020 11:26:21 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4CcvPn2KHwz3C2w; Fri, 20 Nov 2020 11:26:21 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4230A15782; Fri, 20 Nov 2020 11:26:21 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0AKBQL67089517; Fri, 20 Nov 2020 11:26:21 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0AKBQL7f089516; Fri, 20 Nov 2020 11:26:21 GMT (envelope-from manu@FreeBSD.org) Message-Id: <202011201126.0AKBQL7f089516@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Fri, 20 Nov 2020 11:26:21 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r367874 - head/sys/arm/allwinner X-SVN-Group: head X-SVN-Commit-Author: manu X-SVN-Commit-Paths: head/sys/arm/allwinner X-SVN-Commit-Revision: 367874 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Nov 2020 11:26:21 -0000 Author: manu Date: Fri Nov 20 11:26:20 2020 New Revision: 367874 URL: https://svnweb.freebsd.org/changeset/base/367874 Log: if_awg: Split init code into sub function Be clear of what we enable or init. No functional changes intended Modified: head/sys/arm/allwinner/if_awg.c Modified: head/sys/arm/allwinner/if_awg.c ============================================================================== --- head/sys/arm/allwinner/if_awg.c Fri Nov 20 11:25:54 2020 (r367873) +++ head/sys/arm/allwinner/if_awg.c Fri Nov 20 11:26:20 2020 (r367874) @@ -705,50 +705,55 @@ awg_setup_rxfilter(struct awg_softc *sc) } static void -awg_enable_intr(struct awg_softc *sc) +awg_setup_core(struct awg_softc *sc) { + uint32_t val; + + AWG_ASSERT_LOCKED(sc); + /* Configure DMA burst length and priorities */ + val = awg_burst_len << BASIC_CTL_BURST_LEN_SHIFT; + if (awg_rx_tx_pri) + val |= BASIC_CTL_RX_TX_PRI; + WR4(sc, EMAC_BASIC_CTL_1, val); + + /* Enable transmitter */ + val = RD4(sc, EMAC_TX_CTL_0); + WR4(sc, EMAC_TX_CTL_0, val | TX_EN); + + /* Enable receiver */ + val = RD4(sc, EMAC_RX_CTL_0); + WR4(sc, EMAC_RX_CTL_0, val | RX_EN | CHECK_CRC); +} + +static void +awg_enable_dma_intr(struct awg_softc *sc) +{ /* Enable interrupts */ WR4(sc, EMAC_INT_EN, RX_INT_EN | TX_INT_EN | TX_BUF_UA_INT_EN); } static void -awg_disable_intr(struct awg_softc *sc) +awg_disable_dma_intr(struct awg_softc *sc) { /* Disable interrupts */ WR4(sc, EMAC_INT_EN, 0); } static void -awg_init_locked(struct awg_softc *sc) +awg_init_dma(struct awg_softc *sc) { - struct mii_data *mii; uint32_t val; - if_t ifp; - mii = device_get_softc(sc->miibus); - ifp = sc->ifp; - AWG_ASSERT_LOCKED(sc); - if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) - return; - - awg_setup_rxfilter(sc); - - /* Configure DMA burst length and priorities */ - val = awg_burst_len << BASIC_CTL_BURST_LEN_SHIFT; - if (awg_rx_tx_pri) - val |= BASIC_CTL_RX_TX_PRI; - WR4(sc, EMAC_BASIC_CTL_1, val); - /* Enable interrupts */ #ifdef DEVICE_POLLING - if ((if_getcapenable(ifp) & IFCAP_POLLING) == 0) - awg_enable_intr(sc); + if ((if_getcapenable(sc->ifp) & IFCAP_POLLING) == 0) + awg_enable_dma_intr(sc); else - awg_disable_intr(sc); + awg_disable_dma_intr(sc); #else - awg_enable_intr(sc); + awg_enable_dma_intr(sc); #endif /* Enable transmit DMA */ @@ -758,15 +763,26 @@ awg_init_locked(struct awg_softc *sc) /* Enable receive DMA */ val = RD4(sc, EMAC_RX_CTL_1); WR4(sc, EMAC_RX_CTL_1, val | RX_DMA_EN | RX_MD); +} - /* Enable transmitter */ - val = RD4(sc, EMAC_TX_CTL_0); - WR4(sc, EMAC_TX_CTL_0, val | TX_EN); +static void +awg_init_locked(struct awg_softc *sc) +{ + struct mii_data *mii; + if_t ifp; - /* Enable receiver */ - val = RD4(sc, EMAC_RX_CTL_0); - WR4(sc, EMAC_RX_CTL_0, val | RX_EN | CHECK_CRC); + mii = device_get_softc(sc->miibus); + ifp = sc->ifp; + AWG_ASSERT_LOCKED(sc); + + if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) + return; + + awg_setup_rxfilter(sc); + awg_setup_core(sc); + awg_init_dma(sc); + if_setdrvflagbits(ifp, IFF_DRV_RUNNING, IFF_DRV_OACTIVE); mii_mediachg(mii); @@ -813,7 +829,7 @@ awg_stop(struct awg_softc *sc) WR4(sc, EMAC_RX_CTL_0, val & ~RX_EN); /* Disable interrupts */ - awg_disable_intr(sc); + awg_disable_dma_intr(sc); /* Disable transmit DMA */ val = RD4(sc, EMAC_TX_CTL_1); @@ -1101,13 +1117,13 @@ awg_ioctl(if_t ifp, u_long cmd, caddr_t data) if (error != 0) break; AWG_LOCK(sc); - awg_disable_intr(sc); + awg_disable_dma_intr(sc); if_setcapenablebit(ifp, IFCAP_POLLING, 0); AWG_UNLOCK(sc); } else { error = ether_poll_deregister(ifp); AWG_LOCK(sc); - awg_enable_intr(sc); + awg_enable_dma_intr(sc); if_setcapenablebit(ifp, 0, IFCAP_POLLING); AWG_UNLOCK(sc); }