From owner-svn-src-all@freebsd.org Tue Sep 3 14:08:19 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 988F2DDA94; Tue, 3 Sep 2019 14:07:25 +0000 (UTC) (envelope-from yuripv@freebsd.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2610:1c1:1:6074::16:84]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "freefall.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46N80X4Y5zz4QZp; Tue, 3 Sep 2019 14:07:24 +0000 (UTC) (envelope-from yuripv@freebsd.org) Received: by freefall.freebsd.org (Postfix, from userid 1452) id 791641B5C3; Tue, 3 Sep 2019 14:06:38 +0000 (UTC) X-Original-To: yuripv@localmail.freebsd.org Delivered-To: yuripv@localmail.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [96.47.72.80]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client CN "mx1.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by freefall.freebsd.org (Postfix) with ESMTPS id 5B2ED3A79; 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Tue, 23 Apr 2019 12:29:20 +0000 (UTC) (envelope-from kib@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 467D52474A; Tue, 23 Apr 2019 12:29:20 +0000 (UTC) (envelope-from kib@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x3NCTK3w045353; Tue, 23 Apr 2019 12:29:20 GMT (envelope-from kib@FreeBSD.org) Received: (from kib@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x3NCTJ31045352; Tue, 23 Apr 2019 12:29:19 GMT (envelope-from kib@FreeBSD.org) Message-Id: <201904231229.x3NCTJ31045352@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kib set sender to kib@FreeBSD.org using -f From: Konstantin Belousov To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r346597 - in stable/12/sys: amd64/amd64 i386/i386 X-SVN-Group: stable-12 X-SVN-Commit-Author: kib X-SVN-Commit-Paths: in stable/12/sys: amd64/amd64 i386/i386 X-SVN-Commit-Revision: 346597 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk X-Loop: FreeBSD.org Sender: owner-src-committers@freebsd.org X-Rspamd-Queue-Id: 253A46FD79 X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.97 / 15.00]; local_wl_from(0.00)[freebsd.org]; NEURAL_HAM_MEDIUM(-1.00)[-1.000,0]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; NEURAL_HAM_SHORT(-0.97)[-0.970,0]; ASN(0.00)[asn:11403, ipnet:96.47.64.0/20, country:US] Status: O X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Date: Tue, 03 Sep 2019 14:08:19 -0000 X-Original-Date: Tue, 23 Apr 2019 12:29:19 +0000 (UTC) X-List-Received-Date: Tue, 03 Sep 2019 14:08:19 -0000 Author: kib Date: Tue Apr 23 12:29:19 2019 New Revision: 346597 URL: https://svnweb.freebsd.org/changeset/base/346597 Log: MFC r345562 (by cem), r346294: x86: Use XSAVEOPT for fpusave(), when available. Modified: stable/12/sys/amd64/amd64/fpu.c stable/12/sys/i386/i386/npx.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/amd64/amd64/fpu.c ============================================================================== --- stable/12/sys/amd64/amd64/fpu.c Tue Apr 23 12:23:44 2019 (r346596) +++ stable/12/sys/amd64/amd64/fpu.c Tue Apr 23 12:29:19 2019 (r346597) @@ -100,6 +100,17 @@ xsave(char *addr, uint64_t mask) "memory"); } +static __inline void +xsaveopt(char *addr, uint64_t mask) +{ + uint32_t low, hi; + + low = mask; + hi = mask >> 32; + __asm __volatile("xsaveopt %0" : "=m" (*addr) : "a" (low), "d" (hi) : + "memory"); +} + #else /* !(__GNUCLIKE_ASM && !lint) */ void fldcw(u_short cw); @@ -113,6 +124,7 @@ void ldmxcsr(u_int csr); void stmxcsr(u_int *csr); void xrstor(char *addr, uint64_t mask); void xsave(char *addr, uint64_t mask); +void xsaveopt(char *addr, uint64_t mask); #endif /* __GNUCLIKE_ASM && !lint */ @@ -158,6 +170,13 @@ struct xsave_area_elm_descr { } *xsave_area_desc; static void +fpusave_xsaveopt(void *addr) +{ + + xsaveopt((char *)addr, xsave_mask); +} + +static void fpusave_xsave(void *addr) { @@ -201,7 +220,10 @@ DEFINE_IFUNC(, void, fpusave, (void *), static) { init_xsave(); - return (use_xsave ? fpusave_xsave : fpusave_fxsave); + if (use_xsave) + return ((cpu_stdext_feature & CPUID_EXTSTATE_XSAVEOPT) != 0 ? + fpusave_xsaveopt : fpusave_xsave); + return (fpusave_fxsave); } DEFINE_IFUNC(, void, fpurestore, (void *), static) @@ -348,6 +370,7 @@ fpuinit(void) static void fpuinitstate(void *arg __unused) { + uint64_t *xstate_bv; register_t saveintr; int cp[4], i, max_ext_n; @@ -356,7 +379,7 @@ fpuinitstate(void *arg __unused) saveintr = intr_disable(); stop_emulating(); - fpusave(fpu_initialstate); + fpusave_fxsave(fpu_initialstate); if (fpu_initialstate->sv_env.en_mxcsr_mask) cpu_mxcsr_mask = fpu_initialstate->sv_env.en_mxcsr_mask; else @@ -378,6 +401,10 @@ fpuinitstate(void *arg __unused) * Save Area. */ if (use_xsave) { + xstate_bv = (uint64_t *)((char *)(fpu_initialstate + 1) + + offsetof(struct xstate_hdr, xstate_bv)); + *xstate_bv = XFEATURE_ENABLED_X87 | XFEATURE_ENABLED_SSE; + max_ext_n = flsl(xsave_mask); xsave_area_desc = malloc(max_ext_n * sizeof(struct xsave_area_elm_descr), M_DEVBUF, M_WAITOK | M_ZERO); Modified: stable/12/sys/i386/i386/npx.c ============================================================================== --- stable/12/sys/i386/i386/npx.c Tue Apr 23 12:23:44 2019 (r346596) +++ stable/12/sys/i386/i386/npx.c Tue Apr 23 12:29:19 2019 (r346597) @@ -313,7 +313,7 @@ cleanup: } static void -npxsave_xsaveopt(union savefpu *addr) +fpusave_xsaveopt(union savefpu *addr) { xsaveopt((char *)addr, xsave_mask); @@ -352,29 +352,18 @@ init_xsave(void) TUNABLE_INT_FETCH("hw.use_xsave", &use_xsave); } -DEFINE_IFUNC(, void, npxsave_core, (union savefpu *), static) +DEFINE_IFUNC(, void, fpusave, (union savefpu *), static) { init_xsave(); if (use_xsave) return ((cpu_stdext_feature & CPUID_EXTSTATE_XSAVEOPT) != 0 ? - npxsave_xsaveopt : fpusave_xsave); + fpusave_xsaveopt : fpusave_xsave); if (cpu_fxsr) return (fpusave_fxsave); return (fpusave_fnsave); } -DEFINE_IFUNC(, void, fpusave, (union savefpu *), static) -{ - - init_xsave(); - if (use_xsave) - return (fpusave_xsave); - if (cpu_fxsr) - return (fpusave_fxsave); - return (fpusave_fnsave); -} - /* * Enable XSAVE if supported and allowed by user. * Calculate the xsave_mask. @@ -483,6 +472,7 @@ npxinit(bool bsp) static void npxinitstate(void *arg __unused) { + uint64_t *xstate_bv; register_t saveintr; int cp[4], i, max_ext_n; @@ -494,7 +484,10 @@ npxinitstate(void *arg __unused) saveintr = intr_disable(); stop_emulating(); - fpusave(npx_initialstate); + if (cpu_fxsr) + fpusave_fxsave(npx_initialstate); + else + fpusave_fnsave(npx_initialstate); if (cpu_fxsr) { if (npx_initialstate->sv_xmm.sv_env.en_mxcsr_mask) cpu_mxcsr_mask = @@ -515,6 +508,7 @@ npxinitstate(void *arg __unused) sizeof(npx_initialstate->sv_xmm.sv_fp)); bzero(npx_initialstate->sv_xmm.sv_xmm, sizeof(npx_initialstate->sv_xmm.sv_xmm)); + } else bzero(npx_initialstate->sv_87.sv_ac, sizeof(npx_initialstate->sv_87.sv_ac)); @@ -524,6 +518,10 @@ npxinitstate(void *arg __unused) * Save Area. */ if (use_xsave) { + xstate_bv = (uint64_t *)((char *)(npx_initialstate + 1) + + offsetof(struct xstate_hdr, xstate_bv)); + *xstate_bv = XFEATURE_ENABLED_X87 | XFEATURE_ENABLED_SSE; + if (xsave_mask >> 32 != 0) max_ext_n = fls(xsave_mask >> 32) + 32; else @@ -922,7 +920,7 @@ npxsave(union savefpu *addr) { stop_emulating(); - npxsave_core(addr); + fpusave(addr); } void npxswitch(struct thread *td, struct pcb *pcb);