Date: Wed, 26 Sep 2018 22:54:41 +0000 From: bugzilla-noreply@freebsd.org To: ports-bugs@FreeBSD.org Subject: [Bug 230761] New port: cad/verilator: fastest free Verilog HDL simulator Message-ID: <bug-230761-7788-ty6AXIwMDz@https.bugs.freebsd.org/bugzilla/> In-Reply-To: <bug-230761-7788@https.bugs.freebsd.org/bugzilla/> References: <bug-230761-7788@https.bugs.freebsd.org/bugzilla/>
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D230761 --- Comment #2 from Kevin Zheng <kevinz5000@gmail.com> --- Anyone able to take a look? It's been over a month. --=20 You are receiving this mail because: You are the assignee for the bug.=
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