From nobody Fri Feb 6 16:29:21 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4f700f1485z6RPxt for ; Fri, 06 Feb 2026 16:29:22 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R13" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4f700d6MlFz43tL for ; Fri, 06 Feb 2026 16:29:21 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770395361; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=io6qKYVPGtFDnsPB8ccCGFeEZzsA1+DhbMgIUSSufCs=; b=cw6MAurHEKXqFD6ThIOhC/uQ82uEOouqNkhtEazXcRjXKsUhaOR2NSMETJW94/rQfdmmn0 /IKwnKtBrZDB9LwBQQwnZ3kzjZMYZtYdPbqe1kbdHf1Dh+4t/nlhhxF6dV0KtYypgmRxFH hju13kNmjJbyUsriYznm5qnijZEipdrff46mfNpVs0IEpZkQC3p2MZRqTxvIp/8XaePkXJ v6vc9EkGcaEVBi1wxp9xHvXZ8XHFoFA6rLcrHmjyFTa2s7OpNoWpna/sH1fzG5ky9EIr7k XyEimz6L2xDWms5jy5ngwqXkTRhShn91vDXA13eae7yl8NlLZbmkaNkp3dL9Jw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1770395361; a=rsa-sha256; cv=none; b=vw7TpobsVm0zz1nfThJ+pDVKt9e2zNyb4E8Vo3xYF/Ydb+7l1Tn6fu3pCz1Rh17/WacHi1 FiTRZM/4MTmLQhhEkzawcL16RKS69kagvz7ndtQKofUx6EGxK5AnDUhvc+FNmYjzQH/rO9 G7O44EQtCDRkPFqIn66VrlhFLyktlNpbo0lMfK9pLFHwdr6m8w0iS7Qy4GAcCqj5d3Vv5f /v+qADd8Xq2nrZEpK7yrJUrvT8rEJbskbLAaK/9IT6g8jOWPx8yt1jr0WSWwzGeKPKguPQ VGQzd4V9AgMVwxhGSC1qiPW/aanyccmvl8WFvoEldpTYJ2uY4k8LoIBJW5XbpA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770395361; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=io6qKYVPGtFDnsPB8ccCGFeEZzsA1+DhbMgIUSSufCs=; b=syTs50gwEMg1hG98hHcCoPX9eIqRstpRsT/eHHVZJ8/7of91g+iKasCBX11CFeuxjMet1Y 61xojc6Q19xx6smJWjOFbV1QB1TosF/dB9xLKQ3cwIhpYTMqjk31s4h8mcI00RdYbzy697 LaFU5EZykeu1Z1k2sSiZdTt9E98r0aey+wLhS9TvL9vRxmSeoFCsb+4UuiMeK1+mWysmGt evey5Tm6JfNdMKKM4H3wCrb1wNOHUpGHtZ1soH/qzRRGSid5SG1/cTVtsH2m+ZZo2b0Hdf Nc7bautgLaFYW2At4FYesJOSqgndSkgqZZIxYKdF3CM1CwCZX2YabdI6MAFc7w== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4f700d5vHWz7j5 for ; Fri, 06 Feb 2026 16:29:21 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 1e9ac by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Fri, 06 Feb 2026 16:29:21 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Olivier Certner Subject: git: 7bc7692b940b - main - hwpstate_amd(4): Revamp the softc List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: olce X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 7bc7692b940b0c2af0f4a89ae2ef6fbba0bc3381 Auto-Submitted: auto-generated Date: Fri, 06 Feb 2026 16:29:21 +0000 Message-Id: <698616e1.1e9ac.112d5a56@gitrepo.freebsd.org> The branch main has been updated by olce: URL: https://cgit.FreeBSD.org/src/commit/?id=7bc7692b940b0c2af0f4a89ae2ef6fbba0bc3381 commit 7bc7692b940b0c2af0f4a89ae2ef6fbba0bc3381 Author: Olivier Certner AuthorDate: 2026-01-29 16:01:43 +0000 Commit: Olivier Certner CommitDate: 2026-02-06 16:27:32 +0000 hwpstate_amd(4): Revamp the softc As the new CPPC and old P-states modes are exclusive, put their respective data in a union. Rename the field containing the content of the CPPC_REQUEST register. It it now to be accessed using 'cppc.request'. Use an 'unsigned int' instead of 'uint32_t' for 'flags'. This is an internal field whose width could be changed at will. We only have one flag at the moment. No functional change intended. Reviewed by: aokblast Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D55004 --- sys/x86/cpufreq/hwpstate_amd.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/sys/x86/cpufreq/hwpstate_amd.c b/sys/x86/cpufreq/hwpstate_amd.c index 5d96808ceaee..e8499f2e3c88 100644 --- a/sys/x86/cpufreq/hwpstate_amd.c +++ b/sys/x86/cpufreq/hwpstate_amd.c @@ -147,11 +147,18 @@ enum hwpstate_flags { }; struct hwpstate_softc { - device_t dev; - struct hwpstate_setting hwpstate_settings[AMD_10H_11H_MAX_STATES]; - int cfnum; - uint32_t flags; - uint64_t req; + device_t dev; + u_int flags; + union { + struct { + struct hwpstate_setting + hwpstate_settings[AMD_10H_11H_MAX_STATES]; + int cfnum; + }; + struct { + uint64_t request; + } cppc; + }; }; static void hwpstate_identify(driver_t *driver, device_t parent); @@ -321,13 +328,13 @@ set_epp(device_t hwp_device, u_int val) struct hwpstate_softc *sc; sc = device_get_softc(hwp_device); - if (BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, sc->req) == val) + if (BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, sc->cppc.request) == val) return; - SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_EPP_BITS, val); + SET_BITS_VALUE(sc->cppc.request, AMD_CPPC_REQUEST_EPP_BITS, val); x86_msr_op(MSR_AMD_CPPC_REQUEST, MSR_OP_RENDEZVOUS_ONE | MSR_OP_WRITE | MSR_OP_CPUID(cpu_get_pcpu(hwp_device)->pc_cpuid), - sc->req, NULL); + sc->cppc.request, NULL); } static int @@ -348,7 +355,7 @@ sysctl_epp_handler(SYSCTL_HANDLER_ARGS) /* Sysctl knob does not exist if PSTATE_CPPC is not set. */ check_cppc_enabled(sc, __func__); - val = BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, sc->req) * 100 / + val = BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, sc->cppc.request) * 100 / max_epp; error = sysctl_handle_int(oidp, &val, 0, req); if (error != 0 || req->newptr == NULL) @@ -629,7 +636,7 @@ amd_set_autonomous_hwp_cb(void *args) req->res = ret; } - ret = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &sc->req); + ret = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &sc->cppc.request); if (ret != 0) { device_printf(dev, "Failed to read CPPC request MSR for cpu%d (%d)\n", curcpu, @@ -651,15 +658,15 @@ amd_set_autonomous_hwp_cb(void *args) * is the balanced mode. For consistency, we set the same value in AMD's * CPPC driver. */ - SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_EPP_BITS, 0x80); - SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_MIN_PERF_BITS, + SET_BITS_VALUE(sc->cppc.request, AMD_CPPC_REQUEST_EPP_BITS, 0x80); + SET_BITS_VALUE(sc->cppc.request, AMD_CPPC_REQUEST_MIN_PERF_BITS, BITS_VALUE(AMD_CPPC_CAPS_1_LOWEST_PERF_BITS, caps)); - SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_MAX_PERF_BITS, + SET_BITS_VALUE(sc->cppc.request, AMD_CPPC_REQUEST_MAX_PERF_BITS, BITS_VALUE(AMD_CPPC_CAPS_1_HIGHEST_PERF_BITS, caps)); /* enable autonomous mode by setting desired performance to 0 */ - SET_BITS_VALUE(sc->req, AMD_CPPC_REQUEST_DES_PERF_BITS, 0); + SET_BITS_VALUE(sc->cppc.request, AMD_CPPC_REQUEST_DES_PERF_BITS, 0); - ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->req); + ret = wrmsr_safe(MSR_AMD_CPPC_REQUEST, sc->cppc.request); if (ret) { device_printf(dev, "Failed to setup autonomous HWP for cpu%d\n", curcpu);